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Supercomputing IBM

IBM's Eight-Core, 4-GHz Power7 Chip 425

Posted by kdawson
from the 100-racks-of-goodness dept.
pacopico writes "The first details on IBM's upcoming Power7 chip have emerged. The Register is reporting that IBM will ship an eight-core chip running at 4.0 GHz. The chip will support four threads per core and fit into some huge systems. For example, University of Illinois is going to house a 300,000-core machine that can hit 10 petaflops. It'll have 620 TB of memory and support 5 PB/s of memory bandwidth. Optical interconnects anyone?"
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IBM's Eight-Core, 4-GHz Power7 Chip

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  • Finally (Score:4, Funny)

    by xpro42 (1234496) on Monday July 14, 2008 @09:02PM (#24190595)
    Some vista capable hardware.
  • Toasty. (Score:5, Funny)

    by Anonymous Coward on Monday July 14, 2008 @09:04PM (#24190609)

    In other news, temperatures on the University of Illinois campus have mysteriously risen ten degrees. Scientists are still examining possible causes..

    • Re:Toasty. (Score:5, Funny)

      by Yvan256 (722131) on Monday July 14, 2008 @09:31PM (#24190843) Homepage Journal

      Good thing they have a brand-new supercomputer, analyzing this temperature anomaly will be much faster!

    • Re:Toasty. (Score:5, Funny)

      by jmorris42 (1458) * <jmorris.beau@org> on Monday July 14, 2008 @09:55PM (#24191045)

      > Scientists are still examining possible causes..

      Nah. If something gets warmer it is caused by Global Warming and the solution is to eliminate Western industrial civilization.

      If something gets colder it is Global Climate Change and the solution is to eliminate Western industrial civilization.

      If we have more hurricanes it is Global Warming. Fewer and it is Climate Change. More tornadoes? Global Warming. Floods caused by increased snowfall? Somehow that was also Global Warming, I'd have thought they would have went with Global Climate Change, but every rule seems to need an exception.

      • Not a contradiction (Score:3, Informative)

        by Weaselmancer (533834)

        Nah. If something gets warmer it is caused by Global Warming and the solution is to eliminate Western industrial civilization.
        If something gets colder it is Global Climate Change and the solution is to eliminate Western industrial civilization.

        Not a contradiction, even though it seems like one.

        Study the bifurcation diagram. [wikipedia.org] As you drive the system harder by turning up R (which may be analogous to global warming - i.e. more available heat energy might be described this way) notice how the system follows R, then suddenly begins oscillating between two extremes. Keep on driving R harder and it breaks into chaos.

        The weather IMHO has a lot in common with the logistic map equation. It's present behavior is dependent on it's past state, it's swin

  • Core pron (Score:5, Funny)

    by Anonymous Coward on Monday July 14, 2008 @09:07PM (#24190631)

    "For example, University of Illinois is going to house a 300,000-core machine that can hit 10 petaflops. It'll have 620 TB of memory and support 5 PB/s of memory bandwidth."

    I came.

  • iPhone (Score:2, Funny)

    by giorgist (1208992)
    When can I get an iphone with it ?

    G
  • PPC Linux (Score:4, Insightful)

    by Doc Ruby (173196) on Monday July 14, 2008 @09:12PM (#24190663) Homepage Journal

    I'd be a lot more excited about these PPC lines if Ubuntu 8.04 would install and run properly on the PS3, whose PPC+6xDSP architecture would be a great entry level platform for coming up with parallel techniques for the bigger and more parallel PPC chips.

    • Re: (Score:3, Interesting)

      by rbanffy (584143)

      The problem is Sony cripled the environment in ways that make it very hard to use a PS3 as a computer.

      I still think one could build a cheap computer with a Cell processor and make a decent profit. Those über-DSPs could do a whole lot to help the relatively puny PPC cores and having such a box readily available would foster a lot of research with asymmetric multi-processors. It's really sad to see future compsci graduates who never really used anything not descending from an IBM 5150

      That said, I t

      • Re:PPC Linux (Score:5, Insightful)

        by Doc Ruby (173196) on Monday July 14, 2008 @11:26PM (#24191727) Homepage Journal

        No, that is not a problem. Linux, including Ubuntu, has been running on PS3 since the PS3 was released. Every Ubuntu since 6.10 has run on it. And current releases of other Linux (PPC) distros usually do install, especially the Yellow Dog that is the one officially supported by Sony. But the problem is that the Ubuntu team has too few developers, and new features in Ubuntu releases break the installation in ways that the small Cell/PPC team can't keep up with.

        Also, there's nothing really "puny" about the Cell's PPC core, which is a 3.2GHz dual-hyperthread Power core.

        The Cell/Linux platform has already got video drivers that offload graphics from the PPC to the DSPs the same way most distros run graphics on separate VGA chips. It's a little buggy, in beta, but that's why the project just needs more developers. Not more FUD.

        I don't think you really know anything about how Linux actually runs on the Cell, on the PS3. I think you're just repeating the most whiny posts about it you've heard. Because the reality is very different from what you describe, even if it's still got problems. Problems that don't require waiting for more x86 HW revisions, but rather just a little more work on the Cell Linux that Ubuntu is releasing.

    • by ianare (1132971)
      Try yellow dog linux [terrasoftsolutions.com]. And yes they can cluster them.
      • by Doc Ruby (173196)

        Well, I'd rather see the solutions that YDL develops make it into Ubuntu, which is overall a superior "Desktop" distro. Especially for media playing. And with its Debian-derived APT, it's overall a much easier system to maintain.

  • Great (Score:5, Interesting)

    by afidel (530433) on Monday July 14, 2008 @09:30PM (#24190827)
    So you can get 16 cores in a low end box but it still won't have enough I/O slots so you will have to buy a shelf at $obscene_amount, seriously why does IBM put such few I/O slots in the lower end P series boxes?
  • "daisy, daisy ....." or "stop that dave ...."

  • 4 Threads per core? (Score:5, Interesting)

    by jdb2 (800046) * on Monday July 14, 2008 @09:35PM (#24190875) Journal
    It should be noted that previous POWER architectures had 2 threads per core. They also had SMT ( Simultaneous Multi-Threading [wikipedia.org] ) support, which gave them an "effective" 4 threads per core. I wonder. Are the all the threads on the POWER7 "true" threads ( ie. 4 execution units -- 1 per thread ) or is it a 2 thread setup with SMT? On the other hand, if the POWER7 really does have 4 "true" threads, then with SMT you'd get an "effective" *8* threads per core.

    jdb2
    • by XaXXon (202882)

      I always thought the definition of a "core" as whatever the minimal set of hardware required to run a single thread at "full power". By my logic, anytime you run more than one thread on a core, you're doing what SMT does.

      Someone please tell me if I'm wrong (and how).

      • by Macman408 (1308925) on Tuesday July 15, 2008 @03:26AM (#24192975)

        I always thought the definition of a "core" as whatever the minimal set of hardware required to run a single thread at "full power". By my logic, anytime you run more than one thread on a core, you're doing what SMT does.

        Someone please tell me if I'm wrong (and how).

        A core is a set of registers and function units, among other hardware. Each core is, effectively, a completely separate processor (though it likely shares some things, such as the L2 cache and FSB with other cores). Since processor usually refers to a whole chip (encased in a plastic or ceramic package, and soldered on the motherboard), the term "core" refers to when there is more than one inside a single package. The ultimate goal is usually to have all cores on a single piece of silicon, but often multi-chip modules are used (especially early in production), where a four-core processor might contain two silicon dies, each with 2 cores. This can help increase yield (by reducing the die size), and reduce production cost. After improving the yield of the processor, or changing to a reduced feature size (eg 90 nm to 65 nm), a switch back to a single die is possible, reducing the packaging cost.

        Simultaneous Multithreading (SMT), on the other hand, works on a single processor/core. It is a feature that allows sharing of the processor resources, such as registers and functional units. A PowerPC 970 (which never had SMT support) could issue 4 instructions and 1 branch every clock cycle. Because of that, plus the deep pipelines, up to 216 instructions can be in various stages of completion at any given time. However, on average, a program branches every 4 instructions - this means that the processor would have to correctly predict 54 branches to keep the pipeline full, AND that the instructions would be (mostly) independent of each other. This isn't easy to do. So, what many processors do is split the available resources. One might issue 2 instructions from one thread and 2 instructions from another in each clock cycle, or alternate clock cycles issuing 4 from one, then 4 from the other. This shares most of the CPU's resources, while requiring a fairly minimal amount of extra logic to track the second thread.

        So, cores are extra hardware that can perform more calculations. SMT is taking better advantage of what is already present.

        However, the disadvantage of SMT is that it can slow a single-threaded program down, because now it has to share resources. Some processors actually do away with superscalar (aka issuing multiple instructions at once) and out-of-order execution and bypass logic, and instead rotate through many threads. For example, if the pipeline is 8 stages deep and supports 8 threads in hardware, it can issue one instruction from each thread in each clock cycle. Then it never needs to check if an instruction is dependent on an earlier one, because an instruction is completed before the next one from the same program is issued. Having this many threads can also minimize the cost of a branch misprediction, cache miss, or other long-latency events. Also, removing the bypass, dependency checking, multiple-issue, and instruction reordering logic can give a significant reduction in power and area on the chip. The performance hit by these eliminations can then be made up by adding many more cores than you'd see in a superscalar out-of-order processor like a Pentium or Core architecture. The catch is that a processor like this is only faster if you have enough threads to keep the processor busy. However, if your problem is big enough to need a supercomputer, you're darn well going to spend time writing it to take advantage of as many threads as you can.

    • by mike260 (224212)

      Are the all the threads on the POWER7 "true" threads ( ie. 4 execution units -- 1 per thread ) or is it a 2 thread setup with SMT?

      The threads in question are almost certainly SMT-style threads; that is, parallel streams of instructions feeding into the same shared pool of execution resources.
      If you're going to have separate execution resources for each thread then they're not threads, they're cores.
      BTW, one 'execution unit' per thread doesn't make much sense given than modern CPUs need separate execution units for different tasks, and also want to execute multiple instructions in parallel.

    • by SQL Error (16383) on Monday July 14, 2008 @11:28PM (#24191739)

      It should be noted that previous POWER architectures had 2 threads per core.

      Correct.

      They also had SMT ( Simultaneous Multi-Threading ) support, which gave them an "effective" 4 threads per core.

      No, they do not "also" have SMT. It is the SMT that gives them 2 threads per core in the first place.

      Power 5 & 6 have 2-way SMT. Power 7 has 4-way SMT.

  • Memory Bandwidth (Score:5, Interesting)

    by Brad1138 (590148) * <brad1138@yahoo.com> on Monday July 14, 2008 @09:50PM (#24190989)

    It'll have 620 TB of memory and support 5 PB/s

    Is that kind of memory bandwidth possible? You could access the entire 620TB in ~120 milliseconds. I guess nothing is ever to fast, it just seems unrealistically fast.

    • Re: (Score:3, Interesting)

      by irtza (893217)

      I believe the memory is aggregate and so is the bandwidth...so per core memory bandwidth is only 5PB/300K cores/s

      The real question is how memory allocation is done in per core - does each core have unrestricted access to the full 620TB or is it a cluster with each machine having unrestricted access to a subset and a software interface to move data to other nodes.

      if anyone here has insight on this, please fill in the giant blank.

      • Re: (Score:3, Interesting)

        by 777v777 (730694)
        It would be incredibly unlikely that each core could directly access the full 620TB. The current largest machines on the Top500 list are all distributed memory machines(clusters). However, the trends in modern interconnect networks are to increase the capabilities for doing stuff like remote direct memory access (RDMA). In such a scheme, the remote memory is not addressable(with load/store instructions), but stuff can be transferred between memories of different nodes by the network hardware. The codes comm
  • by xbytor (215790) on Monday July 14, 2008 @10:23PM (#24191251) Homepage

    Surely no one would ever need more...

  • by yorkshiredale (1148021) on Monday July 14, 2008 @10:29PM (#24191297)

    That University of Illinois machine sounds like it needs more memory.

    Only 620TB? Why not bump it up to 640? That should be enough for anybody.

    • Re: (Score:3, Interesting)

      by hkfczrqj (671146)
      Being a grad student at Illinois I can tell you something. You really don't know about the University's accounting system. It can literally index every atom in campus (not that they need to). That's why 640 won't be enough :) Also, the supercomputer will require the construction of a new power plant. Seriously.
  • I thought 1 core == 1 thread of execution?

    Or are they talking about some kind of extra hardware support for multitasking?

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