DIY 1980s "Non-Von" Supercomputer 135
Brietech writes "Ever wanted to own your own supercomputer? This guy recreated a 31-processor SIMD supercomputer from the early 1980s called the 'Non-Von 1' in an FPGA. It uses a 'Non-Von Neumann' architecture, and was intended for extremely fast database searches and artificial intelligence applications. Full-scale models were intended to have more than a million processors. It's a cool project for those interested in 'alternative' computer architectures, and yes, full source code (Verilog) is available, along with a python library to program it with." Hope the WIPO patent has expired.
Re:Neat... (Score:5, Informative)
Article at
Everything that you wanted to know and more. An interesting read.
GOOGLE CACHE LINK (Score:4, Informative)
Virtualization vs Hardware vs Verilog (Score:5, Informative)
Folks just don't understand what FPGA's do.
"So, that's neat and all but did I misunderstand something. His model doesn't seem that powerful unless he was using modern processors?"
It's implemented in HARDWARE. Everything runs in parallel. To do the same on a "modern" processor, would require 300-400Mhz. A FPGA running at a [modest] 25Mhz could get the same or better performance.
"I can't help but wonder if this couldn't be emulated for a fraction of the price. Are there any virtualization systems out there that could accomplish what this guy did? I imagine something along the lines of GNS3 might work..."
FPGA's are cheap. A Spartan-3 board can be had for 100-200, and probably hold 2-3 32 node cpu's.
Programmers just don't understand the difference between say verilog, and C/C++/Java.
verilog is the basic building block of CPU's. Everything is done in PARALLEL by default, while in C++/Java everything is done SERIALLY.
Before it was slashdotted... (Score:2, Informative)
I managed to catch this one before the site went down.
Cool stuff. The author says that these were originally designed to have each processor operate on a record in a database. All concurrently.
I imagine the speed of such a system would be staggering... though tough to implement for large data sets. Still pretty cool.
The Python library apparently implements machine code functions so he can debug in real time from the command line. Not my cup of tea, but cool for people that like to fiddle with machine code.
Transputers were for MIMD systems (Score:5, Informative)
Wasn't the transputer [wikipedia.org] an example of this architecture? I'm old enough to be able to say "Get off my lawn!" and remember when the transputer came out; it caused quite a stir.
The transputer was a RISC-ish CPU with 4 high speed DMA/serial links allowing it to be easily connected to other Transputers (each with its own local memory) to form a network. As such, it could be used to build a large MIMD system - not a SIMD one.
Transputers (+ the Occam language) supported multi-threaded programming with very fast context switches and, for its time, they also had very good FP performance when compared to the contemporary x86+float coprocessor.
Re:Virtualization vs Hardware vs Verilog (Score:2, Informative)
What the hell does MIPS have to do with an FPGA? MIPS is an ISA, not a large-scale programmable embedded device/chip.
Sorry, to clarify (with an </i> even!): MIPS is not an "ISA," whatever that is. MIPS is a rather generic term for computational throughput (millions of instructions per second). A million cores running at one instruction per second generates 1 MIPS, so does a single core running at a million instructions per second.
You will use less die real estate and less power with a general-purpose processor designed for the second case than you will with an FPGA that implements the first case... so unless you're lucky enough to be working on one of a few specific parallel problems, you probably do not want to treat FPGAs as the religion you seem to think they are. Most general-purpose computational tasks don't parallelize to the extent that an FPGA is the right way to run them.
If you wanted to perform IDCTs for a video codec all day, a programmable gate array is fine. But if you want to write the rest of a video player, from its file system to its UI, you'd be nuts to do it in an HDL.
Re:Neat... (Score:4, Informative)
Uhhh... right here [nimp.org]. Now don't say I didn't warn you, but it's pretty relevant.
Link attempts to install a virus; need to kill his comment.
Re:Holy CRAP! (Score:3, Informative)
This is more or less the ARM process... license the IP and put it in an ASIC, except this is free.
Yes, ARM ships soft cores, ST Microelectronics uses soft cores (at least internally), Altera, Xilinx, OpenCores. Here's [wikipedia.org] a list so you don't search for "soft core" and find something totally different.
Re:Neat... (Score:3, Informative)
Agreed. Every time something is posted on slashdot there inevitably comes a "yeah but this isn't useful to me" post. Ok, we get it. It wont solve _your_ problem. In fact it might not solve any problem at all. It may just be cool.
It baffles me that some people don't get that. It's like they just tossed the "right brain" out the window because it wasn't relevant to the logical problem at the forefront of their mind. Think outside that box you call a head for once.
I am always surprised where I find inspiration because it's never where I expect.