Ask Slashdot: What's the Best All-Purpose RISC-V System on a Chip Family? 36
And "the family needs to scale — cheap and small at the low end, capable of running Linux on the bigger variants!"
Their requirements?
- WiFi + BLE required
- LoRaWAN a nice-to-have.
- Low power modes that actually work in the field, not just on the datasheet.
- Full peripheral set — SPI, I2C, UART, ADC, timers, CAN.
- A toolchain and runtime support, support multi threads...
Slashdot reader Gravis Zero is skeptical all the requirements can be met. "If you want embedded, you get embedded. If you want to run a big OS, you get one that will run a big OS."
But Slashdot reader SysEngineer believes "The obvious architecture candidates are ARM, STM, and RISC-V" — and specifically they want to hear your experiences with the RISC-V choices. "What would you standardize on today if you were starting fresh? And how does real-world toolchain and community support hold up compared to the marketing?"
Share your own thoughts and experiences in the comments.
What's the best all-purpose RISC-V system on a chip family?