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The Amazing Integrated Microprocessor 78

Posted by CmdrTaco from the but-it's-still-just-vapor dept.
An anonymous reader wrote in to say that "SiByte Inc. has announced the Mercurian processor SB-1250, a single chip containing two MIPS64 CPU capable of running up to 1GHz, plus a 512kByte L2 Cache, PCI, gigabit ethernet (3) and serial (2) interfaces. The whole chip consumes a mere 10 watts with both processors and all interfaces running at full speed. While it is targeted at networking and communications systems, wouldn't you like to have a notebook allowing to carry with you that much processing power? The chip will be able in volume mid next year, and the data sheet states, they will provide support for porting NetBSD and Linux to it." Sure it's vapor, but it sounds pretty impressive.
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The Amazing Integrated Microprocessor

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  • Last I'd seen it was still supposed to ship with the processor. It can't ship earlier and still be tested against the real production chipset.
  • Yes a shared cache can actually be an excellent feature for multi-threaded apps that are using static cache data set.

    BTW:- This chip or something similar it is the future of computing. Very cool indeed.
  • If there's more than one that's been created it is portable. End of story.

    As for the list of processors and lies listed, here's a more accurate one.

    • Intel ia32 (x86) - In production
    • Intel ia64 (Itanium) - In beta
    • Clipper - Dropped when Intergraph (the chip vendor and biggest user) stopped production and moved to x86
    • MIPS - Dropped due to virtually no sales of MIPS PCs
    • Alpha - Dropped after Compaq stopped support
    • PowerPC - Cancelled by IBM after they killed off CHRP and PReP platforms
  • Yah, but if the serial port goes bad, it will probably take the CPU with it.

    Which would be a bad thing.
  • Are you kidding? We'll need this much horsepower to run Windows CE 4.0...
  • Despite the availablility of multiprocessor Mips32 and Mips64 systems, there is currently no support for SMP in the Mips kernel tree.

    This is becase where the ia32 archetecture has a common and well-documented SMP method, APIC, Mips does not. Each vendor seems to do their own proprietary thing.

    This would definately be cool but I'll believe it when i see it.

  • Some notes:
    RS6000 is a whole family of workstations/servers from IBM - not a processor architecture.

    (RS6000 systems run on POWER, POWER2, PowerPC, and POWER3 cpus.)

    HP's PA-RISC is missing, IBM's RT, Motorola 88k, NS32K, SH3/SH4, Intel i960 (not sure about that)...

  • Internet Appliance is a ratehr enigmatic term. Would you want the Apple Cube to be put into the same class as, say, WebTV? Not I. The Cube is an impressive. WebTV.. No. On another note, while it would be nice to see the Apple to use a custom Athlon (without the x86 translation) rumour hold true, Apple really just has to threaten to take their business elsewhere and Motorola will likely shape up.

  • always wondered can 2, or more, transmeta chips work in smp?

    Doubtful; the microprocessors themselves have an integrated northbridge which would make this difficult.

  • Whats the Performance of 1Ghz MIPS chip?
    Could it equal or surpass the king of the hill
    Alphas EV67?

    That would be a wild setup for Seti units in so.
    but still no word on the setup prolly vaporware like so many things now days.
  • While SGI's MIPS CPUs aren't all that high on clock speed, they still manage good performance.

    My 175MHz R10000 (1MB L2 cache) manages to crunch a SETI@Home packet in only 9 hours. I like my Indigo2 ;)

    Since MIPS does a lot per clock, one can only imagine the performance of such a core clocked at 1 GHz.
  • And glad you saw it. I started to change it yesterday, but didn't get around to it. I guess I'll leave it a while if people are still noticing.

    Leave it. It's quite original, funny, and doesn't mentions Signal 11 or Jon Katz. That's rare here on Slashdot!

  • Then Microsoft stepped in.... ;)

  • can I get ess! can I get an Jee! can I get an eye! can I get an ess-jee-eye! (with one of those things in it)

  • My 175MHz R10000 (1MB L2 cache) manages to crunch a SETI@Home packet in only 9 hours.

    My celeron 450 will crunch a seti packet in about 8 1/2 hrs, so they are roughly equivalent with this test even though the mips is running at less than 1/2 the clock speed. I would certainly like to see SGIs with 1GHz chips. I certainly couldn't afford to buy one, but I can always dream.

  • If they really want to do something, kill the old-tech serial ports and give us USB and Firewire instead. Of course, this isn't great for Linux, but it sounds phenomenal for anything else.
  • Comment removed based on user account deletion
  • Whether it can achieve that rate depends on how much local parallelism exists in the code; it does not depend on whether the instruction scheduling is done by the CPU or the compiler.
  • Wouldn't vaporwear be really, thin, filmy clothing? (As contrasted with vaporware)

    Sorry, couldn't resist.

  • Yep, these "targets" have been making me chuckle for years. The 386 was targeted for servers. All I could think of at the time was that I wanted one to replace the 8086 on my desk at work. Fuck servers! I wanna compile/link faster!

    Is there any reason someone wouldn't want to use this new processor for other miscellaneous purposes? Typically, only downside to these "fringe" processors is that they don't run legacy x86 stuff, but if you run an OS like Linux or *BSD where you have the source to almost everything anyway, then binary compatability doesn't matter nearly as much, as long as you have a compiler. Once you get away from the need for binary compatability, you have the luxury of getting to focus on performance issues, so the marketroids' claims about the "target" may be completely irrelevant.


    ---
  • When IBM introduced the IBM PC/AT in 1984 they were very clear in their press materials that a computer that powerful was meant for server use and that nobody would need the power of the mighty 80286 on the desktop.
  • The same idea is happening all over the embedded market. There is a company out there that has done pretty much the same thing, except they are using the x86 instruction set. Included on this x86 system in a chip is ethernet IrDa, sound and i think svga video.

    Now let's take this a step further...
    Eventually, we're going to see the limit on how far we can push a single processor, and the only real logical direction to go until we find the next best thing (light based computers?), multiprocessor systems will become the norm. and now that everyone has finnaly cought on to multi-core chips... this may actually become an affordable (affordable for the average joe computer user...) reality. ibm had the right idea with the mutli core g4 idea.. but that has yet to materialize.
  • Maybe it's time to start porting OpenGL to IOS :]

  • It's for performance/simplicity, not for fault tolerance. If you want fault tolerance, then build a computer that contains several of these multi-CPU chips.


    ---
  • if only jobs could/would break ranks with motorola and stick such a beast in the cube and re-christen it the "cube-squared : the world's first internet APPLiancE", i'd be smiling for months...
  • Cisco doesn't buy or own component manufacturers. Therefore - this would not be someone Cisco would buy.

    As it looks, this is a hot chip and if 1/2 of the claims on the "data sheet" come true it will be a nice tool. However, that "data sheet" isn't much yet. A real data sheet for this chip should push 800 pages.

    Big time vaporware at this time.
  • www.zflinux.com describes a 386 class system on a chip, including all interfaces

    But, in my opinion, the company is poorly run. All my inquiries about their products have been completely unanswered. I would definitely not purchase from them unless they made an extreme turnaround.

  • Microsoft still supports these non-Intel CPUs.

    • ARM
    • MIPS
    • PowerPC
    • SH

    Granted, this is for WinCE. See the full list here. [microsoft.com]

    regards,

    -l

    have a day,

    -l

  • Glad you caught it. The humor-impaired moderator certainly didn't. I'm going to assume that they don't understand moderation and wanted to say, "This is really funny, but I can't moderate it that way because the story is redundant." Yeah, that's it.
  • This is purely targetted at routers and switches, with the extra glue logic they are tossing in. It's completely not designed for a laptop/desktop/whatever -- you would never use 3 GigE interfaces simultaneously except in a switching/routing/whatever environment.

    The package is all wrong for the PC market as well, an 860 BGA? Probably requires 12-16 layer PCB just to breakout all the rows. But, that's a common stack for networking...

    It'll make a real nice embedded web cache controller (or content-switch, or whatever the term-du-jour is).

    And those who claim vapor on it -- I suspect this part is vapor, but I would bet dollars-to-donuts that they already have a single-CPU test chip in their lab without all the other cool goodies in this version. TSMC 0.15 micron process has been stable for a little while now, so the test chip could even be in the same process.
  • heheheheh...

    ? shoot NORTH
    you missed
    ? shoot NE
    hit!
    ? use BFG
    you are now using the Big F-ing Gun
    ? shoot NE
    you have killed the llamas.
  • Indeed, and this is due to a funky little trick kind of pulled from VMS and OS/400 (neither of which ever really got ported) called the HAL or "Hardware Abstraction Layer".

    The theory is that the OS does not handle any calls to hardware services itself at - it asks the HAL. The HAL in NT4 was only a few Mb of compiled code that picks up this call, interprets it for the "local" architecture, and then passes it on down. This means that NT can be ported by re-wrting just the HAL itself. Or at least in theory. I'm not an MS code-monkey, but my friends who are tell me there are other "areas" that need to b re-written for the OS to be ported, but even then it shouldn't be more than about 20Mb of compiled code.

    In actual fact, it's the one aspect of NT that I really like. There are times I wish a free OS would implement such a system (I think NetBSD uses a similar principle in that the amount of core code to port is reduced), because then we could basically get a bunch of free OSes running on loads of hardware. FreeBSD on a Psion 5 would rock my world to say the least. OpenBSD on a Palm V. Linux on a Sun Enterprise 10000. NetBSD on an AS/400. You get the idea. :-)

    Anyway, as I was saying. I always thought that the HAL would slow things down massively, but apparently the performance hit is minimal. I'm sure somebody else will have more info on this.
  • If you like that, you'll love the Cray (nee Tera) MTA [tera.com]
  • A spell checker would not have found this since able is spelled correctly. A grammer checker might have found it, but I have always found them to be a bit lacking....
    Kent
  • Care to explain how a spell checker would work in this case? Last I checked, able was a valid spelling.
  • Guess what will be next cisco aquisition.

    Cisco IOS has run on MIPS32 for ages, I see no problems for them making it run on MIPS64.

    This just looks like the next CPU for a cisco line card. If foundry, intel, juniper or any of the other sharks in the pond will not eat it first.

    That is if this is not vapourware.

  • Target (Score:3)

    by AntiPasto ( 168263 ) on Tuesday October 10, 2000 @05:41AM (#717667) Journal
    I am always amused by the "targetted for..." statements because its the single most vaporous statement about any new hardware. They always seem to denote some sort of special quality about the product when we know that most things are just another chip or device. What I want to see "this should revolutionize" or "this doesn't suck because..." or something more along those lines. Perhaps even "you bet your ass you could use it to..." etc.

    Reminds me of endless blurbs in PC Magazine about what things are "targetted for..."

    ----

  • A viable solution for 'network appliances'. The crusoe looks poised to be the cpu for all those 'e-appliances' you hear about, but hell, 1ghz? ill take that over the crusoe any day. Im sure there could be other applications for something like this as well, such as onboard computers for automobiles, mobile 'web access' terminals on planes, etc etc. Interesting..... BTW, since im too lazy to check the site, has transmetta produced any real usable hw yet for the general consumer? I for one would be interested in building a little mp3 player to go into my stereo rack.

    "sex on tv is bad, you might fall off..."
  • A spelling checker wouldn't catch that. Most grammar checkers wouldn't either. Perhaps eyes would be best.

    TWW

  • Wouldn't that mean 'single point of failure' too?
    If the processor goes, everything goes.

  • Sure, it's impressive right now.

    But what they're saying is that it'll be released mid next year. Will it still be impressive then?

    I don't really think so. It'll just be another processor like all the others.

    Carrying water to the ocean is what i'd call it.
  • Heh... people were actually being rather polite to you :)

    Jeremy

  • Heck, give me one for my desktop. :-) (Score:3)

    by Talonius ( 97106 ) on Tuesday October 10, 2000 @05:43AM (#717673)

    Bus speed runs at half of the speed of the processor, so it's 500 Mhz. (The key to Mercurian's unique architecture is its intelligent, high-performance MP design built around a fast, on-chip internal bus called the ZBbusTM. The ZBbus, which runs at half the CPU core clock with a data width of 256 bits (one cache line), connects all the major blocks of the processor including the CPU cores, cache memory, and I/O.)

    The chips work in conjunction with each other, not against each other or in a master/slave relationship. That's got to help matters as well.

    The only thing I can squawk about is the L2 cache being shared by both processors. I suppose this means you can claim 512 L2 cache for each processor, but what if they are both working in completely different memory spaces; would that effectively drop to 256k cache? Does it matter?

    And the PCI bus looks to be nice; claiming 400 Mhz clock with 6.4Gb/second; looks to be utilizing a trick similar to AMDs 200 Mhz FSB.

    This chip just goes to show you what you can or could do by leaving the x86 architecture behind. (Backward compatibility, backward compatibility, backwar Shuddup!)

    Please pass the FUD.. :-)

    -- Talonius

    Off-topic: What would the world be like without a past and legacies? Where would we be? What dreams and myths would we come up with, in today's day and age? Something fun to think on.

  • I have doubts that it will ever get to run linux or BSD. I mean cisco buing the entire outfit. And I consider it to be highly probable.

  • How about 128 32-bit cores on a single die? (Score:3)

    by NortonDC ( 211601 ) on Tuesday October 10, 2000 @05:44AM (#717675) Homepage
    Check out http://www.eet.com/story/OEG20001009S0026

    "German startup Pact GmbH will attempt to leapfrog the growing field of highly parallel processors targeting communications when it rolls out a complex 30-million-transistor CPU that integrates 128 thirty-two-bit processors at this week's Microprocessor Forum."

  • I didn't see anything about the die size of the chip, but considering all the stuff that's on it and the fact that it's made on a brand-new .15 micron process, I'm betting it's going to be expensive.

    Transmeta doesn't design systems; it's up to other companies to decide what to do with their chips. Those stereo component MP3 players will probably be using Cirrus Logic chips that are cheaper than Crusoes because they use a much slower ARM core.
  • > Cool!

    Thanks.

    And glad you saw it. I started to change it yesterday, but didn't get around to it. I guess I'll leave it a while if people are still noticing.

    --
    Give me a candidate who speaks out against the war on drugs.
  • Stuff like that has been sort of a holy grail for years, usually under names like amorphous computing or cellular computing or RAW, but writing compilers that can turn C or Java code into something that these chips can run efficiently is reallyhard.
  • Microsoft simultaneously released their BackOffice apps (SQL Server, Exchange, etc.), service packs and OS releases for all the Windows NT supported processors (Except for PowerPC where the porting and release was done by IBM and not Microsoft). Of course, nobody else seemed to release non-Intel versions of their software. Also, Windows NT was actually written on MIPS and ported to x86. But don't let the facts get in the way of a good flame.
  • And Windows NT is useable, and currently supported, on these architectures:
    1. x86



    ________________________________________

  • fskin' astroturfer - piss off (Score:1)

    by Anonymous Coward
    • Intel IA32 (x86) - Same old shit.
    • Intel IA64 (Itanium) - Same shit, different day.
    • Clipper - Yu li.
    • MIPS - And I can buy this OS where?
    • Alpha - MS killed support.
    • PowerPC - MS dropped support.
    Lesse, the score for *nix would be:
    1. x86 - for any x>3
    2. PowerPC
    3. (Strong) Arm
    4. 680x0 - for any x (?)
    5. Dragonball - but I repeat myself
    6. MIPS - any MIPS, right?
    7. Alpha - 'natch
    8. SPARC - I'm not even going to individually list 'em all
    9. RS6000
    10. SH8
    11. PDP-x - for x>= 8, suck that, Bill!
    12. VAX
    13. AS400 - if you must
    14. S/390
    15. geeze, I'm running outta steam here, little help?
    16. and don't you even mention MS and clustering in the same breath
  • 1. x86 - for any x>3
    should read
    1. x86 - for any x

    There are Linux ports that run on the 8086/8088/80286/V20, and 80386 is still the default CPU.

    Also add to the list:

    17. Z80
  • True. But the post was about whether Microsoft could write portable code not whether enough people cared enough to actually buy it. (Try buying a PReP architecture PowerPC box or a Clipper based PC running any OS)

  • + network latency would likely be lowered by an order of magnitude.

    - I can't imagine frame rates being very good.

    An accomplished Quake god in text mode Quake on a router might very well be someone to fear.

    regards,

    -l

    have a day,

    -l

  • He did say at least, implying at the time the article was posted or some indeterminate time before that.
  • Generallly put, CMOS chips don't fail unless there's some severe power spike or ESD.

    I'm sure this thing could run for 30 years if treated properly without a hitch... solid state technology, we love you! :)

  • Good performance? With 2 processors at 1GHz and an issue rate of 4 instructions per-cycle, it could supposedly execute 8 billion instructions per second. However, it does say it only supports in-order execution, so its probably never going to get anywhere near this...
  • not sure this is the same company, but someone in the silicon valley had a ultra low power MIPS running at 1GHZ in their lab some months ago, designed specifically for switches/routers.

    i guess it's okay to dream about logging onto procewatch and seeing quad consumer grade cpu ATX mobos for this beast someday, even if the possibility is remote.
  • I have been following this company for a while now. That SB-1 core looks sweet. The lead designer worked on both the Alpha and Strong Arm, so the VC pitch has been Alpha speed at StrongArm power levels. They are privatly held,otherwise a lot of my old coworkers would have bought some shares. Assuming that a chip with the core makes it through tape out and into a product they are either going to have a skyrocketing IPO or (more likely) get bought out by the big guys. Cisco is an early favorite (they buy everything) but Intel should not be discounted (recently bought Level1). I dont think that a smaller company will want to pay the premium that will be on the company's worth if the SB-1 core works as advertised.

    Of course this assumes that everything goes well. High frequency/low power stuff at Very Deep Sub Micron (VDSM) can run into a lot of problems during tapeout (crosstalk, timing, DRC violations, buggs in the back end tools). Still, that core is sweet.

  • Parallelism at that level requires cooperation of the hardware system because you are interacting with a very complex cache system. As for vendors taking their own proprietary path, that is because they've aimed for a slightly different target, IBM with its multiple System on a Chip, Alpha with its simultaneous multithreading, Sparc with their snoopy bus on node card, and SGI with their cache directory. Now if anyone can reconcile these approaches within the same kernel tree, I think they deserve a Gorden Bell prize or two! You also have to keep in mind that Linus intended LInux to be for small (typically one) CPU systems. SGI have publicly said that they design node cards (e.g. the 4-8 CPU brick for their O3000 line) to sacrifice some performance in low-end to gain massive scalability at the high end. You don't expect a jet turbine to be powering your car right? (interesting though it may be).

    What might be a more interesting question is can you mix cards and CPUs of different frequencies and even architectures. For example, if there is enough critical mass opt-in for say the RapidIO standard [rapidio.org] (a big if), then if CPUs/kernels (not just Linux) standardise on compatible IPC mechanisms and shared data structures/objects, you can possibly have a system where you only upgrade the CPU rather than throwing out the whole machine every 2-3 years. Due to its complexity and human intensive nature, software changes more slowly than hardware where you can just ramp up the shrink process. There are already some hints of this with the HandSpring module, where you retain your familiar interface but just up the capabilities according to your preference. However, I suspect to do this properly with Linux may require some thought into how the ELF object code format can support mupport multiple systems. [handspring.com]

    Perhaps something to discuss at that new 64bit unix [technocrat.net] mailing list set up recently. LL

  • Sure its vapor, but it sounds pretty impressive... (Score:4)

    by nagora ( 177841 ) on Tuesday October 10, 2000 @05:44AM (#717691)
    Is not the most insightful comment I've ever seen. Vapourware always looks impressive.
  • Stop flaming, we all caught it now.
  • Cisco? Since when did Cisco have something that could run LNX or NetBSD?

  • Oh wait... I forgot. Though shalt have one processor, x86.

    Couldn't resist a little dig there. I'm still pissed that there are no strong-arm laptops because Microsoft can't get their shit together and write portable code :P After-all, "It doesn't run Windows so why build one?"

    "No judge, we do not have an adverse effect on the industry. Just look at McAffee... they get to charge $16K a pop to plug up our Outlook holes. That's industry growth, by golly!"

    OK, I'm ranting... :P

    "Free your mind and your ass will follow"

  • > Seriously, Slashdot editors, use a spell checker next time

    Nah. If they started proofreading their articles we'd start saying they were pretentious gits, and Slashdot would loose that common, homey touch that makes it so popular.

    --
    Give me a candidate who speaks out against the war on drugs.

  • Microcontollers (Score:1)

    by Anonymous Coward
    Isn't an integrated Microprocessor called a Microcontroller? Why use the term "Integrated Microprocessor"? Is this something different? pixelbeat.

  • Re:Time to buy (Score:3)

    by Emil Brink ( 69213 ) on Tuesday October 10, 2000 @05:51AM (#717697) Homepage
    Oh, I don't know, but at least since this [slashdot.org] was written... ;^)
  • Then multi-threaded apps actually have less overhead. The processor caches are already synched up.

    If course whether this is good or bad depends on the problem.

  • Welcome back to the days of CoCos, Commies, Amigas and Macs. We have a number of tiny-ish companies with great ideas that will unfortunatly go the way of the Amiga. IBM had more money at the time and was able to better market an inferior machine. These devices, as cool as they are, will not progress to a respectable level (though this new one does actually have SOME promise, even if it is vapour). My question is how the hell they can do it with a mere 10 watts? WOW! Now if only there was a way to directly address the risc-esque core of the intel and amd chips, while still being able to address the translation units to keep backwards compatability. That would be something to shoot for as the translation (and the units that facilitate that) eat up ALOT of juice and produce ALOT of heat.

  • "Nero MCCCXXXVII VkrIpVII kIddXIII est."

    Uhh, "Nero 1337 5kr1p7 k1dd13 est."

    Nero is a 1337 5kr1p7 k1dd13.
    Cool!

  • Dropped my jaw to the floor. Drool all over the keyboard. My GUI is getting gooey.

    No pr0n, just the chip.

    --

  • umm... only since /. reported on something it existed?

    wow

  • You mean like Linux is native to the PDP-8? :-)
  • If your processor has failed I'm sure that the fact your serial port no longer works is going to be the least of your worries.. ;-)
  • Their website looks reminiscent of the Digital:Convergence website. Let's hope that their sales practices and engineering skills aren't similar.
  • Let's see. Windows NT has been commercially released on the following architectures:
    • Intel IA32 (x86)
    • Intel IA64 (Itanium)
    • Clipper
    • MIPS
    • Alpha
    • PowerPC
    And possibly others in the lab that weren't even as commercially viable as the Clipper. Sounds portable to me. Of course, nobody seems to have wanted to actually buy the non-Intel architectures but that's another issue.
  • Seems to me that if you lost a processor in most modern communications equipment that you are pretty much dead in the water. That is assuming you weren't able to convince your boss to spring for the super-duper dual processor, dual backplane, dual powersupply, dual network administrator model...

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