Printing Chips 86
batty writes :"Nature has this article about a process that uses a quartz die and a laser to mechanically print features onto chips instead of photo-etching them. The article mentions engraving a silicon wafer with features only 10 nanometres in size, as opposed to 130 nanometres using photlithography, and the process is quicker, simpler, and more environmentally friendly than current processes. Which is nice."
So now my Baked Lays (Score:1, Offtopic)
How nice.
Re:Timothy, DO NOT REPOST SAME ARTICLES (Score:1)
Oh, well... it's better to post on the duplicate, since it's newer and will be read more.
This process isn't nearly as revolutionary nor as useful as the authors imply, though. I'm not saying it's been done before, but there's really no reason to do so. What they accomplished was to make a regular array of dots. Very small, true, but dots, nonetheless. The shapes made on a die are usually more complex than simple dots... Maybe this process could be useful in creating vias(connections between layers - notoriously difficult to get good connection). I doubt the durability of a little blade of silicon, stamping a "wire" over and over into the resist. A set of masks for a relatively simple chip at
This process is 18 times finer than
Different (Score:2)
Same (Score:1, Interesting)
From previous BBC article
That was a JOKE... (Score:2)
But how do you make the mold (Score:1)
I am assuming they are relying on something like electron beam lithography to create the imprint mold, certainly this would be a cost/time improvement over direct e-beam litho, but it all depends on longevity of the molds.
Re:But how do you make the mold (Score:2, Insightful)
Really, it should last a fair bit of time, quartz is durable. Rather hard, fairly high melting point points to it being ideal for this use.
Re:But how do you make the mold (Score:4, Interesting)
Enterprising young ACs.
-josh
Re:But how do you make the mold (Score:1)
and as for the prototype, it could easily be just a larger chip, then scaled down once its encoded as instructions
Re:But how do you make the mold (Score:1)
In the current manufacturing method, the entire wafer is coated with a photosensitive material (photoresist), and then the desired image is sequentially shined onto small areas of the wafer to pattern a few die at a time (usually a 2 or 4 die group known as a field, depending on the chip size). To complete the patterning of a single wafer can take several minutes, as the stepper/scanner machine has to custom align and expose each field individually.
This patterning is done using a reticle, which is a quartz plate with the desired pattern printed on it with a chrome layer. The reticle between the light source and the photosensitive wafer surface. The reticle patterned surface never physically touches any surface, so that no defects are created. Even a single spec of dust on the chrome side of the reticle will kill all die patterned using this reticle.
Once the sequential patterning of the entire wafer surface has been completed, the wafer is sent to a developer, where the exposed photoresist is stripped off the wafer using a chemical, leaving photoresist only in the areas which were not exposed to light (areas which were under the chrome parts of the reticle).
Now let's consider the direct printing methods: One applies a polymer, similar to the photoresist but without the photosensitive chemical additives. The desired pattern is physically pressed into the polymer using a mask. This patterning stamping is repeated for each die, until the entire wafer has been processed, and then the wafer is sent on for processing (implant, etch, whatever). There is no develop process, as the image was stamped directly onto the wafer surface.
Another method uses a quartz contact surface and a laser to transfer the pattern to the wafer. This is an important distinction, between optical and direct contact patterning... the reference pattern **directly contacts the surface to be patterned**. Let's assume there are 100 fields on the wafer which need to be patterned. Now let's be optimistic and say that the stamper can last for 500 stampings. That means that every 5 wafers, you'll need a new stamper. Replacing a stamper is not going to be a simple process... and time is definitely money in the semiconductor industry. Having a tool sit idle after every 5 wafers patterned is simply unacceptable. Also, the direct contact between the stamper and the surface will result in polymer adhering to the stamper, which will cause pattern to be blocked. Think of a cookie cutter with a closed top surface... how many cookies can you stamp out before it gets clogged with dough? All it takes is for one or two features on the stamper to be clogged, and then every die patterned after that will be dead. So, if the stamper get's corrupted after 50 stampings, the remaining 450 fields in the 5 wafer patterned set will be useless. That's 200 good chips, and about 20,000 bad chips. Now take into account that modern processors have 15-20 layers of patterning required for each chip, meaning that each chip must get perfectly stamped 20 times... what are the odds of getting even 1 good die? The answer is slim to none.
As for the chemical savings, the only chemical in the photo process which is not used in the stamping process is the developer solution. Developer solution for photolithography is usually a strong basic solution (tetramethyl ammonium hydroxide is a very common developer solution, as it is water soluble). So you don't use one of the chemicals. That's like saying that by getting rid of the power steering in your car, you are saving on all that power steering fluid getting into the environment. In the big scheme of things, this is a non-issue.
Another issue is the overlay to previously printed layers. The pattern must be *precisely* aligned to the layer underneath, otherwise the electrical connnections won't be correct. Using optical patterning, the corrections can be made by tilting/rotating the reticle, varying scan speeds, and the image can be optically expanded/shrunk for scaling corrections. With direct patterning, the stamped features cannot be corrected for other than the most gross alignment issues.
In short, the use of direct patterning is interesting for the laying down of a single layer of small holes a couple of times, but getting a yielding device from it? Get real. It ain't gonna happen. The best that it could be used for is the production of things like diffraction gratings or similar single layer non-critical patterning where small defects will not affect the overall image.
correction (Score:2)
With the current technology, the photons are not used directly to etch the silicon, but it is used to act on a photo-sensitive compound, which will then protect (or not) the silicon against acid etching, ion implant,
Already posted (Score:5, Informative)
OutStripping Moores Law (Score:2, Interesting)
The author of this article from Princeton was reported in the BBC as saying he thinks he can outstrip Moores Law with this new technology!
Re:OutStripping Moores Law (Score:2)
Moore's law squared.
--
Hey, I can dream can't I?
Re:OutStripping Moores Law (Score:1)
Thanks, I'll be here all week!
Physical Laws (Score:2, Insightful)
Also, the tecnique will be used for a myriad of other things, including spaceships made entirely of silicon, allowing them to be freed from laws of gravity and friction.
In terms of CPU lingo (Score:2)
Re:In terms of CPU lingo (Score:1)
That's the funny thing about reality. It continues to work whether or not you believe in it. It's sort of the definition.
Re:In terms of CPU lingo (Score:1, Interesting)
Quantum mechanics is NOT reality. It is a DESCRIPTION that matches empirical data, just as in ancient times, astronomers used "epicycles" to explain the puzzling pathways of the planets and stars when they thought the earth was at the center of the universe. Did it matter to ship navigators whether or not the astronmers were correct? Most of the time, the theory of epicycles was an adequate explanation for their needs.
I do not believe in the reality of particle-wave duality, but it does provide the most adequately useful DESCRIPTION to date so that people are able to invent things on top of it.
Re: (Score:1)
Re:In terms of CPU lingo (Score:2, Interesting)
Re:In terms of CPU lingo (Score:2)
I don't expect that some day we're going to hit a roadblock and all these chip manufacturing companies are going to just give up and say "well, we've come a long way, but physics won't let us go any further; it's been fun!" This is just one of the gateways into a slow transition into a more quantum-based computer chip.
Re:In terms of CPU lingo (Score:1)
Duh! You invite the quantum mechanics to the party (Score:1)
>what semiconductors will work at until quantum
>effects step in and ruin the party
Near that point you no longer need wires for current to flow just separated metal plates that they can use as steeping stones.
Re:In terms of CPU lingo (Score:1)
Comparisons. (Score:3, Funny)
Thanks for the meaningful comparison.
In other news, computers can add 2+2 three trillion times faster than you can commute to work. More at 11.
Whence comes this sudden feeling of... (Score:1)
Quote from article (Score:1)
Tomorrow's microprocessors could be laser printed.
You think my HP can do it?.. Still I didnt think that the paper is pin compatible.
Neat, now I can get that nueral implant. (Score:1)
What about the other 20 layers, now? (Score:1)
You still have to connect the damn dots. And on top of that, your first metalization layer has to be the same "feature size" as your transistors (or else it can't connect them!). So unless they figure out how to get 10nm photo masking for metal deposition, or figure out some other way to put the first metal layer down at 10nm, this is useless.
Re:What about the other 20 layers, now? (Score:1, Insightful)
-5, Clueless.
If you're using mechanical masking for all of the semiconductor layers, why would you suddenly turn brain-dead and use photo-masking for the metal layers?
Re:What about the other 20 layers, now? (Score:2, Informative)
Silicon is used to make the TRANSISTORS. This is because it is easy to implant boron etc. into the silicon for making the wells in the transistor. This process (if manufacturable in high volume) will be useful for making the TRANSISTORS. You still have to connect them. What are you going to do, deposit silicon on top of the wafer, now, to make another "mask"? Then melt the silicon and pour in metal on top of that or something? If you've figured out how to do that the combined might of the semiconductor industry wants to pay you a lot of money!
No, you have to deposit various layers of metal and dielectric to connect the transistors. Many ICs have up to 7 or 8 layers of metalization, which means depositing the ILD, putting in interconnects, and depositing the metal (think "wires"). Currently the only way to do this is through photo masking followed by some deposition process.
Re:What about the other 20 layers, now? (Score:2)
-josh
Re:What about the other 20 layers, now? (Score:1)
Now...if I can only figure out why my Poly Hard Mask tool is showing a 2 nanometer CD mismatch in Litho I'll be doing great!!!
Re:0.13um is way outclass now (Score:2)
UMC has already started a joint venture with a German firn in Sinagapore at 65nm. Production is set to start in '04 or '05. Apparently people within IBM think this is getting towards the end of the line on CMOS shrinking for performance enhancement although further shrinkage would enable more transistors in a smaller area they wouldn't necessarily be faster. If you don't like to hear bad news, Intel will be happy to cheer you up. They say THz desktop chips are no problem and everybody is goingto want one, but I think they have a good reason to be deceptively optomistic. I tend to believe IBM over Intel in this debate and although they're also optomistic for gains over a long time scale, but they're pretty gloomy in near term prognostications. I seem to have read several places where they say yeah chips could be much faster, but not both cheaper and faster any time soon once we get past the
Personally, I think this is about it. Taiwan started moving everything to China several years ago and anybody who thinks the technology is going to be highly refined by transferring it to the Mainland has obviously never been to the two countries in question. Mainland is currently riding around on training wheels making chips using
Other efforts in NanoTech (Score:1)
article on Chou's work and related work by Willson. Has info on the men as well as the techniques.
3D VOLUME HOLOGRAPHIC TECHNOLOGY TO BE (Score:1)
used for 3D volume lithography replication,
wiring, circuits, xerography, storage, photonic
molecular switches, video, and many more
applications.
http://colossalstorage.net/colossal.htm
once again scientist are still thinking of
2D area flat concepts instead of 3D Volume,
maybe someday thinking might evolve !!
It Has All the Advantages (Score:1)
stamping process is not useful for mass production (Score:1)
In the current manufacturing method, the entire wafer is coated with a photosensitive material (photoresist), and then the desired image is sequentially shined onto small areas of the wafer to pattern a few die at a time (usually a 2 or 4 die group known as a field, depending on the chip size). To complete the patterning of a single wafer can take several minutes, as the stepper/scanner machine has to custom align and expose each field individually.
This patterning is done using a reticle, which is a quartz plate with the desired pattern printed on it with a chrome layer. The reticle between the light source and the photosensitive wafer surface. The reticle patterned surface never physically touches any surface, so that no defects are created. Even a single spec of dust on the chrome side of the reticle will kill all die patterned using this reticle.
Once the sequential patterning of the entire wafer surface has been completed, the wafer is sent to a developer, where the exposed photoresist is stripped off the wafer using a chemical, leaving photoresist only in the areas which were not exposed to light (areas which were under the chrome parts of the reticle).
Now let's consider the direct printing methods: One applies a polymer, similar to the photoresist but without the photosensitive chemical additives. The desired pattern is physically pressed into the polymer using a mask. This patterning stamping is repeated for each die, until the entire wafer has been processed, and then the wafer is sent on for processing (implant, etch, whatever). There is no develop process, as the image was stamped directly onto the wafer surface.
Another method uses a quartz contact surface and a laser to transfer the pattern to the wafer. This is an important distinction, between optical and direct contact patterning... the reference pattern **directly contacts the surface to be patterned**. Let's assume there are 100 fields on the wafer which need to be patterned. Now let's be optimistic and say that the stamper can last for 500 stampings. That means that every 5 wafers, you'll need a new stamper. Replacing a stamper is not going to be a simple process... and time is definitely money in the semiconductor industry. Having a tool sit idle after every 5 wafers patterned is simply unacceptable. Also, the direct contact between the stamper and the surface will result in polymer adhering to the stamper, which will cause pattern to be blocked. Think of a cookie cutter with a closed top surface... how many cookies can you stamp out before it gets clogged with dough? All it takes is for one or two features on the stamper to be clogged, and then every die patterned after that will be dead. So, if the stamper get's corrupted after 50 stampings, the remaining 450 fields in the 5 wafer patterned set will be useless. That's 200 good chips, and about 20,000 bad chips. Now take into account that modern processors have 15-20 layers of patterning required for each chip, meaning that each chip must get perfectly stamped 20 times... what are the odds of getting even 1 good die? The answer is slim to none.
As for the chemical savings, the only chemical in the photo process which is not used in the stamping process is the developer solution. Developer solution for photolithography is usually a strong basic solution (tetramethyl ammonium hydroxide is a very common developer solution, as it is water soluble). So you don't use one of the chemicals. That's like saying that by getting rid of the power steering in your car, you are saving on all that power steering fluid getting into the environment. In the big scheme of things, this is a non-issue.
Another issue is the overlay to previously printed layers. The pattern must be *precisely* aligned to the layer underneath, otherwise the electrical connnections won't be correct. Using optical patterning, the corrections can be made by tilting/rotating the reticle, varying scan speeds, and the image can be optically expanded/shrunk for scaling corrections. With direct patterning, the stamped features cannot be corrected for other than the most gross alignment issues.
In short, the use of direct patterning is interesting for the laying down of a single layer of small holes a couple of times, but getting a yielding device from it? Get real. It ain't gonna happen. The best that it could be used for is the production of things like diffraction gratings or similar single layer non-critical patterning where small defects will not affect the overall image.
Re:stamping process is not useful for mass product (Score:3, Informative)
Point 1 - they are not talking about a single-die stamper. Actually they were talking about a whole-wafer stamper, created by e-beam lithography, If, as you suggest, a single stamper is good for only 500 stamps, this gives a 500:1 power boost to e-beam - good going.
Point 2, the stamping is not purely mechanical. A laser beam at a frequency at which the quartz stamper is transparent but the silicon isn't is shone through the stamper. This softens the silicon, so the stamper presses into it. No photoresist, and far less mechanical wear on the stamper. Quartz is pretty damned hard stuff, whereas softened silicon is (I guess) not - so I would guess a lifetime in the thousands or tens of thousands for the stamper, not hundreds.
Re:stamping process is not useful for mass product (Score:2, Interesting)
Also, let's say that the stamper can do 1 stamp per minute (aggressive, but ya gotta make some assumptions). How do you determine when the first little imprinter point snaps off, and every subsequent stamp creates a dead die. If it happens during the first several hundred wafers patterned, and the stamper isn't changed for thousands of stamps, there's going to be an awful lot of non-yielding die at end of line. That's a real bummer, because nobody buys the chips that fail sort/etest for anything more challenging than pretty keychains/ornaments.
Another problem is going to be that the surface of a wafer is *not* flat. Run a wafer through a diffusion furnace, and it warps like an album left in the sun (ok, so I'm dating myself... but the analogy is valid). Let's assume that the wafer bows up at the edges, relative to the center. If you try to press the entire wafer at once, you are going to get excessive pressures at the edges, while the center of the wafer isn't yet touched by the stamper. As a result, the center of the wafer isn't going to get any pattern, and so the center of the wafer won't yield usable die. Bummer.
Another issue is that *all* wafers end up with particles on the surface, be it aluminum, stainless steel, tantalum, or just plain old dust. What happens to the little imprinter fingers when you try to press them into a hunk of steel? I'll give you a hint, it'll be like holding your fingers out straight and punching a bowling ball... your fingers are gonna break. How well are your fingers going to be at pressing anything after that? On the wafer scale, any stamper which hits a die that has a surface defect will result in that die being defective on all subsequent pressings. More keychain ornaments, but less working chips and much less profitable.
In closing, let's consider one other little issue. In patterning, the goal is to have the sidewalls as nearly perpendicular to the surface as possible. A cross section view of a line should look like a skyscraper, with vertical sides, and not like a pyramid/trapezoid. In order to stamp and be able to extract the stamper from the imprinted surface without ripping off teeth, the impresser has to be tapered to minimize friction effects. Etchers and implanters really don't do well with tapered sidewalls on the pattern... you lose resolution of the resultant structures/implants.
A little slow, don't you think (Score:1)
click here to read the article [slashdot.org]
Lets stop the threads HERE.
Useful, eh. (Score:2)
Yeah, I can see where this'd be useful.
Actually, I was gonna cut off my comment ther, butt I figgered I cood right mor abowt thiz. So heer it iz. Printin' chips cood bring the price down and allow finer resolution or whatever, making it possible to put a million billion tranziztorz on a dam chip, making it possible to make chips so complicated that a program to printf "hello world" will be like a thousand gigabytes, because there'd be like 999 gigabytes of setup code to get all the transistors pointing in the right direction or something, and then like a gigabyte of code to actually do the work, and the whole damn thing'll get executed in like five days or something. It'll have like a million billion exahertz internal clock, so they'll sell it by that number and people will buy, but in reality, they'll've broken each operation into like 500,000,000,000,000,000,000,000,000 separate stages in the processor, so when it comes down to it, it'll take up like a trillion gigawatt-hours of electricity to power this processor for like a picosecond, and then the whole damn grid will meltdown, leaving us in the stoneage or something. Ooooooooooooooh well.
Yeah, you should've let me stop at that first sentence where I originally planned to stop, but, you know, whatever.
Re:Pathways (Score:1)
not quite (Score:1)
While it isn't limited by the width of a photon, it is still limited by things like the width of an atom.
Umm... Did the guys at Nature understand this? (Score:3, Informative)
Nature's article stated that a laser was used to 'liquify' silicon and then the quartz mask was pressed into the resulting mush. This doesn't make sense because (a) heat is something you dont want when doing fine patterning - thermal expansion tends to cause everything to shift by microns, and you want to work with nanometers. (b) Melting silicon and then quickly re-cooling it tends to destroy the crystal structure which is needed for semiconductors to work. Making a single Si crystal requires long, SLOW cooling. (c) Even if the previous items could be overcome, so what? Pressing a pattern into liquid Si and then cooling it gives you lumpy silicon - not a transistor. Transistors are made by putting small amounts of impurities (Phosphorus and Arsenic mostly) into the Si which changes the conductivity and the dominant charge carriers.
Sooo... Assuming that Nature really boned this one up, here's how the Scientific American version works: A thin layer of polymer (like a photoresist) is spread over the wafer, then the mask is carefuly aligned to any existing structures and placed in contact with the wafer/polymer combo. The laser is then used to cause a photochemical reaction that hardens the polymer in places where it isn't protected by the mask. The remaining soft polymer is then removed (I'm guessing there's a solvent step here - so much for the no chemical use idea) and the result is the pattern of whatever you're trying to make left in the hardened polymer. From here, you can etch, implant, or whatever other normal Si processing step you want. The main difference seems to be that the contact mask in the new process and the thin polymer layers give a higher resolution.
If anyone has more specific info or a link to a technical paper, please post it. Right now it appears that we have two major science magazines in conflict, and from my experience (I once had to build a mask generator in grad school - amazing what you can do with LabView and some old photography equipment) the SciAm version makes a heck of a lot more sense.
tried 30 years ago (Score:2)