New Pentium 5 Details - 5-7ghz? 408
zymano writes "This article gives some details on Pentium 5. It will have 64 bit extensions and maybe a 4000 mhz frontside bus. Quote from the article,'The Pentium V is likely to fly along at between 5GHz to 7GHz, have 2MB plus of level two cache, be built on a 90 nanometer process, and have a stackable design. '"
The next chip called Nehalem (Score:5, Funny)
Re:The next chip called Nehalem (Score:3, Funny)
It's just you.
Ah, another day of karma whoring. Will I be successful? Only time will tell :)
Sadly (Score:3, Interesting)
64-bit extensions? In the same way AltiVec was 128-bit extensions?
The 4GHz bus does sound good, thought.
Real 64 Bit extensions (Score:5, Informative)
64bit pointers and basic math on those pointers, are really what people desire so that more than 4GB can be trivially addressed in a single process's virtual memory space. Think about people who want to manipulate a video file that is larger than 4GB.
AltiVEC **128 bit** is just wide data manipulation and is of no use for those that require large memory footprints. It has the same 32 bit address lines and pointers at a 60MHz Pentium I.
That being said, P-V should also have more than the current 36 bit of physical address lines. I'm guessing they will have 40 usable bits or so of the address bus to physically address memory.
So if you want to put in more than 4GB of RAM you can. But if you don't, 64 bits will be useful to address more than 4GB of a video file sitting in virtual memory.
Re:Real 64 Bit extensions (Score:2)
The G3 and G4 are 32bit chips, the G4 has Altivec. The G5 is a 64bit chip and has Altivec.
Re:Sadly (Score:2, Funny)
It's Intel, more likely to be 20x200 MHz...
Yes but ... (Score:5, Funny)
Other Issues (Score:5, Funny)
Other components (Score:3, Funny)
Wonder if I'll have to unplug my stove in order to allow my PC access to the ol' 220V, or perhaps I'll just ask my landlord for access to the MAINS.
Either way... I have this picture of the lights in my apartment dimming and my power meter suddenly s
Re:Other Issues (Score:3, Funny)
From an inside source.
"Yes the new pentiums heat will rise exponetially with the number of cycles. So we've added special bios to control the useage of excess CPU cycles, and allow the users to decide whether or not to run their chips full out. If this protection system fails and the
Re:Other Issues (Score:2)
Article Text (Score:4, Informative)
The chip will sample internally at Intel in January 2004 and will take between four to six months to get to market. The Pentium 6 will follow a very similar schedule.
The Pentium V is likely to fly along at between 5GHz to 7GHz, have 2MB plus of level two cache, be built on a 90 nanometer process, and have a stackable design.
The processor we believe, sits in the LGA 775 pin socket, and above it is a very thin heatsink. But, according to sources close to the firm's plans, another permeable heatsink can sit between this and another microprocessor module, giving a stackable design.
The final design of this arrangement is not set in stone.
According to this source, and the details have not been confirmed, a module sitting on top could provide 64-bit extensions.
And the source claimed, Microsoft is ready to launch a version of Windows called Elements with 64-bit extensions.
The idea seems to be that people can buy a 32-bit module, and then add in the 64-bit processor.
There are three samples of an arrangement of the Pentium V here in Taiwan this week, with a very thin processor and lots of wires and patches stuck on it, just to show proof of concept.
The Pentium V could have a front side bus speed of as much as 4000MHz, the source claimed, although this may be reserved for the next chip along, the Nehalem.
Re:Article Text (Score:3, Insightful)
only thing certain is that it is just marketing at this point.
on a sidenote.. no fucking way for a modular system(add in 64bit shit ala math co-processor), not anymore. there's just no point in selling so expensive ships for consumer use that there would be much point in such. and also it does sound like it would be quite awful design too that way(being '64bit' extensions which could be just about anything!)..
also the timing schedule mentioned somewhere seems a LITTLE opti
Token Beowulf Comment ... (Score:2, Insightful)
They would need some serious cooling going on at those speeds
Anyhow Imagine a Beowulf Cluster of these
are you serious? (Score:5, Funny)
Ok here, um the next AMD processors will be faster than before, have more cache, maybe some new instructions [doworkNow! then doworkNow! (ext)].
I must be an AMD insider now, l33t l33t !
Tom
Re:are you serious? (Score:2)
It isn't funny, it's insightful! They are talking about P5 and P6! With a 4Ghz front side bus! And it only needs a little heatsink! And at the bottom, under related links, they have stuff about the Pentium 8! And it's the Inquirer!
Besides, everybody knows that the new AMD will run at 10Thz, with a 1Thz FSB! And its new 3dTomorrow SIMD extentions actually see through time and execute on data that is yet to be! It will be prerendering Doom 5 scenes before you are even decide which game to play! Wh
Stackable Design Flaw (Score:5, Insightful)
No this is not a troll. I honestly wonder how they expect to accomplish this.
Anyone know?
Cheers,
Justin
Re:Stackable Design Flaw (Score:2)
Re:Stackable Design Flaw (Score:5, Informative)
There will be a heatsink inbetween the stacked processors, although it would be more properly named a heat spreader. They just call it permeable because it will have holes drilled into it so pins can attach to the lower processor.
Re:Stackable Design Flaw (Score:4, Informative)
Yes, I saw that in the article, and it's pretty much the only way you *can* do it, to have something separating the chips. The question is, how can they get this to work? I mean, there's limits to how fast heat can be spread away by something like this (based on the heat conduction coefficient of the material you are using) and the latency between chips increases linearly as you increase the thickness of the separator... We can barely keep faster chips right now cool with enormous heatsinks... this seems far more ambitious.
Also remember ohmic heating is proportional to the square of the clock speed (yes, it goes down by a factor as you get the components smaller, but you see where this is heading). IT will be a long while till Intel chips don't put out a ton of heat (when they start using something like spintronics or photonics). There's simply too much current to dissapate.
Cheers,
Justin
Re:Stackable Design Flaw (Score:3, Interesting)
The problem here is that you are absolutely wrong... (nothing personal)
We haven't come anywhere close to the limits of traditional cooling... There are just such high temperatures in current systems, because OEMs are trying to save $1 on every unit. It's a ridiculous situation, but I can tell you, from first-hand experience, that buying relative inexpensive heatsinks/fans, you can get incredible impro
Re:Stackable Design Flaw (Score:3, Informative)
This is not true. Power dissipation is linear to clock speed - it is square to the voltage .
And, in fact, that's not the whole story either. Today, current leakage is a very serious issue (I haven't seen concrete numbers for 90nm process technology, but the leakage gets larger the smaller process technology you use, and the power dissipation due to leakage gets comparable to the power dissipation due to the transistor switching),
Re:Stackable Design Flaw (Score:2)
I guess it is not like they want to sell you processors, which you can stack as you like, but for them to make multi-core chips cheaper.
I assume they do it in the same way they do it with the Pentium4 or Athlon-64. Heat-spreaders. They can increase almost arbitrarily the area of the chip (but not the die).
Re:Stackable Design Flaw (Score:3, Interesting)
simple copper plate between the 2 processors with heat pipes emerging to channel the heat out to a radiating surface.
really simple actually.
I just hope they stop their current trend of raping their customers when they want to have SMP.
no a Xeon is not worth the price... Give me Pentium 4 chips that can do SMP (only fricking 2 way is fine!) AMD can do it... and do it well with their MP's why cant intel?
Re:Stackable Design Flaw (Score:3, Informative)
Current chips generally require all sorts of nasty sup
So when will they change product names/lines (Score:3, Interesting)
Re:So when will they change product names/lines (Score:2)
Re:So when will they change product names/lines (Score:2)
K9 (Score:3, Funny)
Yes but.. (Score:5, Funny)
The new processor will go from 5-7 GHz... (Score:5, Funny)
Re:The new processor will go from 5-7 GHz... (Score:2)
James
Re:The new processor will go from 5-7 GHz... (Score:2, Funny)
It's moderated as funny... (Score:3, Interesting)
The reason? Intel has sold the GHz (aka the MHz) myth so well, they need to increase clockspeed in order to make
Wintel boo. (Score:3, Interesting)
Worthless story. (Score:5, Insightful)
Some quotes:
"The Pentium V is likely..."
"The processor we believe..."
"The final design of this arrangement is not set in stone."
"...details have not been confirmed,..."
"... the source claimed..."
"The Pentium V could have..."
"...although this may be reserved for the next chip along, the Nehalem"
This isn't news, this is BS speculation.
Re:Worthless story. (Score:3, Interesting)
Re:Worthless story. (Score:2)
--Joey
Yeah but will it actually feel faster? (Score:5, Interesting)
Are they doing a direct trade off where they ramp up the clockspeed and break the instructions down so that less is getting done per clock or something?
Cheers.
Re:Yeah but will it actually feel faster? (Score:4, Informative)
Yes, thats exactly what they are doing. The P4 pipeline is 20 stages, and the P3s is something like 10. The longer pipeline helps them to ramp up speed, but at the cost of efficiency. Wheeeee.
Re:Yeah but will it actually feel faster? (Score:2)
The true test of speed improvement is when you're doing something very CPU intensive that can entirely fit in memory - otherwise almost all of your time is spent waiting for the dri
Re:Yeah but will it actually feel faster? (Score:2)
Try emulating something using protected mode memory with DOSbox.
Re:Yeah but will it actually feel faster? (Score:5, Informative)
I can't speak for SCSI, Firewire, SIDE, or any other drive techs 'cause I'm a cheap S.O.B. and won't pay the big bucks for them.
We moved an application from 2 UltraSPARC III 750 MHz CPU's to 6 UltraSPARC III Cu 900 MHz CPU's and saw very little improvement in performance. Then we moved the disk for the application from 9 internal drives to 20 external SCSI over FC drives, and voila our IO wait dropped from 60% or so to 10% +/-. Our query response times dropped by a factor of three or more. Faster, and even more, CPU's are not the answer to data intensive problems, I/O is. Slower (clock speed wise) 64bit CPU's, with better efficiency, more memory addressing, etc. are the norm in the data center for just this reason. IF you can take advantage of your L1/L2 cache then faster clock speed on the CPU will improve performance. The reason most Intel PC's benchmark better than an older box is because the disk, memory and video sub-systems have improved, not because the CPU is making a huge difference.
As proof, search SPEC's benchmark results [spec.org] using Dell and then Sun as your search criteria. Notice the following:
Theoretically the PE2650 should outperform the PE2550 and 280R by about 3 times, all other factors being equal (i.e. same benchmark). The SPEC benchmark does its absolute best to eliminate I/O systems and network interfaces as a factor, so if we are just talking CPU, cache and memory, the Xeon should have had a CINT baseline of about 1600 or so.
Things get even worse when you start looking at the SMP capabilities and scalability. In a truly linearly scalable SMP system you should be able to go from 1 CPU to 2 CPU's and have the benchmark double. Even the best SMP systems (Sun UltraSPARC and IBM Power) can't quite achieve that. But Itanium really has trouble. Search on Dell and look at the CINT and CFP rates benchmarks. Look at 1, 2 and 4 CPU scores for the Dell 7150.
Bottom line? If you are doing heavy lifting on a server, go SMP with 64bit RISC, or, in some cases, use a cluster of 2 CPU x86 servers. If you are a PC user, you are unlikely to see a significant performance increase with new Intel CPU's unless you upgrade the whole system, not just the CPU.
This whole thing of adding clock cycles and deepening the pipeline is not working out well.
Re:Yeah but will it actually feel faster? (Score:4, Informative)
what i want to know is how much you pay your admin people.. you bought more CPU's even though you were 60% iowait ?
Actually, we knew we needed both CPU's and disk. Here's why. The system was IO bound, that was clear from a simple reading of top. But we also intended to add more users, and even if we removed the factors contributing to being IO bound, we still would need more CPU cycles for the user queries. Because of the way the project was built and interconnected with some other projects, we first added the CPU's, and then moved the data to new disk. So, we were able to measure performance in both states.
in general, 64bit computing is a waste of time and performance, unless you need a 64 bit address space. you can fit half the instructions in cache, half the pointers in your data structures, load half as many addresses per cycle, etc. We've got a couple of 8 and 16GB SQL server boxes so when Win64 and SQL64 have baked a bit longer we may migrate those databases to 64bit platforms..
Sorry, but your beloved wintel doesn't support the heavy lifting needed. I have yet to see a true multi-terabyte data warehouse run on wintel and sql server. Although you just might be able to do it reasonably using Windows, Intel and Sybase IQ Multiplex. The application I was talking about was a 350 GB fraud datamart .... not even the data warehouse. This datamart, on technology that is not "interesting or novel", manages to support that much data, real time data loads, real time interactive queries and so forth. And, as you might imagine, a fraud datamart gets very heavy ad-hoc analytical queries. We aren't really worried about the technology being interesting or novel, we are worried about it doing what we need it to do. I suspect that a 4 or 8 CPU system based on Intel technology would be CPU bound in this situation, not IO bound. Although I'm not really willing to try it and waste the money.
We have consistently hit performance and scalability ceilings with Intel, especially when running Windows. Intel processors seem to scale a bit better with Solaris x86 or Linux than with Windows, although not much. By contrast, the main limiting factor we have found with our Sun and IBM technology is our disk farm. Then again, the organization I work for deals with nearly 200 million transactions annually, a data warehouse that contains about 2.5 terabytes of data, an imaging system with more than one billion images available in either real time or as little as 10 minutes (for the offline images), about 5,000 total users and more than 5,000,000 customers who all have to interact with the system in some fashion or another. So, not only is the performance and scalability important, but so is the reliability, availability and stability. When the downtime costs more than entire wintel server, you find that the ROI of those Sun and IBM servers you scoffed at makes a lot of sense. The data center doesn't run on those platforms (not to mention HP Superdome and Alpha) because of some sort of hegemony, but rather because the systems are proven, reliable, stable, scalable and perform well with enormous user and data loads on them. On top of all of that, they aren't vulnerable to the worm of the week because the OS vendor can't manage to separate the user from the OS.
Not to turn this into a holy war or something, but Intel CPU's may increase in computing power each generation, but if you plot a curve using something objective like SPEC you see that the increase is a parabolic curve along the X axis, that is performance is not increasing as fast as it did in the prior generation. Put processor generation/clock speed on the X axis and SPEC benchmark baseline on the Y axis. Now, hopefully, Intel will figure a technology path out of their dead end. However, if you take the increase in performance of "boring" 64bit RISC processors, interestingly enough the curve is parabolic along the Y axis. Admittedly the improvement is gentle, but still there.
So, back to my original point, usin
Re:Yeah but will it actually feel faster? (Score:2)
e.g. ab -n 300 -c 10 "http://127.0.0.1/mydynamichtmlurl/"
static html (direct to index)
ab -n 1000 -c 50 "http://127.0.0.1/index.html"
static html non direct to index page.
ab -n 1000 -c 50 "http://127.0.0.1/"
Re:Yeah but will it actually feel faster? (Score:2)
I can't com
It will with multimedia and games (Score:4, Insightful)
Games, it goes without saying, scale in a similar way [tomshardware.com] and a similar doubling of performance.
The caveat: for many business applications, you will hardly notice a difference. A faster I/O subsystem and more RAM, as you mention, will pay much larger dividends for these users than any processor upgrade will. In fact, this post is being written up on my trusty P2-400MHz all-SCSI box and it's still going strong, though it's getting a bit long in the tooth.
Electro-Magnetic Headache. (Score:3, Interesting)
Oh and by the way, i'm running a PIII750 and the only things i would upgrade to are Apple and a 64bit processor. I'm not going to upgrade for a long time.
Re:Electro-Magnetic Headache. (Score:4, Interesting)
The traces do act like a waveguide with no sides. Just a top and bottom to propagate the wave. The problem is fringing effects. That is why its such an accomplishment when they move the spacing closer and closer.
I've noticed that the only time i see significant improvement of a processor is when the cache is larger or bus speed is faster.
Maybe Intel should look into creating a 4Ghz processor with 4Ghz bus and a ton of cache. Because you could do calculations at 7Ghz but if you can only move data at 4Ghz... your only running at 4.
Correct me if im wrong.
Finally! A clueful response! (Score:2)
Give yourself a pat on the back...you're obviously a real geek and clearly understand the issues raised by the parent poster a hell of a lot better than the other clueless idiots (geek wanabes...they should be ashamed!) that have responded so far. You've also answered a question that I've often w
Re:Electro-Magnetic Headache. (Score:2)
Let me know... (Score:2, Insightful)
Yeah but... (Score:3, Funny)
Will it make coffee?
Re:Yeah but... (Score:2)
Re:Yeah but... (Score:5, Funny)
Re:Yeah but... (Score:2)
If marketing thinks they can beat AMD this way, it surely will.
Although some minor specification details will change when they actually release it.
"Pentium Five" -- isn't that redundant? (Score:3, Interesting)
Re:"Pentium Five" -- isn't that redundant? (Score:4, Insightful)
Re:"Pentium Five" -- isn't that redundant? (Score:2)
Re:"Pentium Five" -- isn't that redundant? (Score:2)
32-64 Bit (Score:2)
Rus
New chip ? Why not build a totally new one ? (Score:2)
My 0.02$
Re:New chip ? Why not build a totally new one ? (Score:2)
You mean... (Score:3, Insightful)
Face it - the only way we'll see the end of x86 is if someone builds a new, non-x86 chip that can still run all that existing x86 code at least as well as the best existing x86 processors. Otherwise it's just another niche architecture, and no-one's going to "upgrade" to it.
Intel forgot that, or thought they could force it on people anyway. AMD remembered, but took the easy way out & just extended things. Similarly, IBM got it wrong with OS/2, and MS jumped straig
Re:New chip ? Why not build a totally new one ? (Score:3, Informative)
Even running it outside of a server, you have to have a special version of Windows, which doesn't have all of the features that the 32-bit Windows does (Windows for the Opteron line is supposed to fix this). It's hideously expensive, meaning fewer people adopted it, which meant that costs stayed high, so there was less encouragement for people to adopt it, even within the server/workstation market in which it was sold.
AMD is going about
Re:New chip ? Why not build a totally new one ? (Score:2)
For instance, x86 processors allow unaligned memory access, which is one of the reasons that SMP on x86 is difficult. Most modern (non-x86) processors will raise an exception if you don't align memory access. Make an x86 processor that does that and it's no longer an x86 processor.
Why architecture doesn't matter all that much (Score:4, Informative)
It complicates cache design, yes, but it's a solved problem.
In x86, you can store into instructions. Even right before they get executed. Even right before they get executed by another CPU. And it all works right. Now that causes architectural complications.
Think about what that means. The superscalar processor is happily going along, executing several instructions ahead simultaneously. Then information comes in that some instruction already executed but whose results have not yet been committed to memory has been overwritten. The processor has to discard everything dependent on that instruction, back up, and do it over.
It sounds horrible. But if you view it as another case of speculative execution (where, at a branch, the CPU starts executing on both paths until the branch is decided) it starts to become clear how to implement this in silicon.
The key to all this is the "retirement unit", which first appeared in the Pentium Pro. The Pentium Pro was the first "modern" x86 machine. Up until the Pentium Pro, what went on inside the CPU was reasonably closely related to the user-level instruction set. In the Pentium Pro, the user-level and internal architectures parted company. Inside a Pentium Pro/II/III/IV is a dataflow machine, pipelining little self-contained operations expressed in an internal instruction set that's quite different from the one the programmer sees. The dataflow machine is front-ended by an x86 instruction translator, and back ended by the "retirement unit". The "retirement unit" takes the outputs of the dataflow machine, figures out which ones to keep and which ones to dump, and determines what gets stored in the programmer-visible registers and memory.
In addition, the Pentium Pro and later machines have far more registers in the CPU than the programmer sees. The Pentium Pro and later have 40 or more registers storing temporary results. Storing data in a temporary variable on the stack just puts it in a register representing that stack slot. There's little or no penalty for this compared to having the value in an x86 register. Eventually the retirement unit pushes the value out to memory (i.e. cache), but the processor doesn't wait for that event.
Once architectures broke the problem apart like that, the programmer-visible instruction set didn't matter that much. This is why RISC isn't very important any more. The original RISC idea, as expressed in early MIPS machines and the DEC Alpha, was to have simple, fixed-sized instructions, a simple CPU, and execute one instruction per clock. This made sense when non-RISC machines were executing less than one instruction per clock.
But the Pentium Pro architecture changed all that. Now, more than one instruction was being executed per clock in a microprocessor. To keep up, RISC machines had to go to similarly complex architectures, losing the simplicity advantages of RISC, while keeping the code bloat of fixed-size instructions.
There are other ways to accomplish the same result. AMD does instruction translation when instructions move into the cache. Transmeta does it in software when the program is loaded. But none of today's fast machines are directly executing what the programmer wrote.
That's why instruction set architecture doesn't matter much any more.
All this takes huge transistor counts, and acres of chip designers. (Intel's acres of chip designers, each in their own tiny cubicle, with one acre of cubicles per room, are at Intel's Santa Clara facility. I've been there, but fortunately don't work there.) But it all works.
No point in a 5GHz processor (Score:5, Insightful)
4GHz front-side bus? Yeah, right.
Re:No point in a 5GHz processor (Score:2)
Re:No point in a 5GHz processor (Score:3, Insightful)
"what the kids want."
or...
"If we don't make this, the customers might buy from AMD."
or...
"If we keep promising more speed than our copmpetitor, then they'll decide to wait until the next upgrade cycle before considering the other guy's product."
Hell, I still cant figure out why I would need 2.4GHz on my desktop, but I guess I'm just not a "savy consumer".
Does it even make sense? (Score:3, Interesting)
If the speed of light is not far from being a limit at this point, then clock speed improvements can't continue working for long.
Besides, there's the question of whether it will "fly" or not. Clock speed doesn't measure performance. It especially says nothing of the performance of a new chip.
The downside... (Score:2)
I've had one for years. (Score:3, Funny)
Asynchronous chips? (Score:2)
Asynchronous processors are meant to be able to provide extra processing power, without having to tie everything down to a clock cycle. The added benefit being that the information is only delivered when everything is ready.
Does anyone know where we are with these chips, and how long before they find themselves in main
Re:Asynchronous chips? (Score:2)
On the other hand, I've also h
Re:Asynchronous chips? (Score:2)
But power transistors have been able to produce more W/M^2 than reactors for a long time. Sounds scary, but not really that bad.
The Story So Far... (Score:4, Funny)
AMD: "Uh... We don't need GHz to keep up. That's what We have these new nifty + ratings eh?"
Intel: "Uh... HYPER-THREADING! WE'RE AWESOME!"
AMD: "And we have a better 64-bit processor than your dinky Itanium. It doesn't need to 'emulate'. What a bunch of idiots."
Intel: "OMG OMG! WE HAVE ULTRA 1337 SPEED! I MEAN 5-7 GHZ AND 4 GHZ FSB! I MEAN AREN'T WE COOL! 64-BIT EXTENSIONS!"
AMD: "... Shut up. Better yet, don't shut up. It's good for our business, because at least we're delivering."
Call Me a Pessimist But.... (Score:2)
Response to recent AMD good press? (Score:2, Interesting)
A bird in hand is worth two in bush. Intel, you will now pay for your complacency. You did not beli
Well this makes it obvious... (Score:3, Interesting)
Does this qualify as a pre-announcement, that just happens to be overlapping a competitor's introduction? I seem to remember that several decades ago, another three-letter company got in a decade-long heap of trouble for just that type of behavior. (Amoung others, but then there are more stories of things Intel has done to keep AMD 'present, but weak.')
Big deal (Score:3, Insightful)
.
Re:Big deal (Score:5, Funny)
Can you name the OS with four wheel drive, smells like a steak and seats thirty-five..
Canyonero! Canyonero!
Well, it goes real slow with the Pentium down, It's the operating system endorsed by a clown!
Canyonero! (Yah!) Canyonero!
[Bill Gates:] Hey Hey
The Linux Users' commission has ruled the Canyonero unsafe for WAN or LAN use.
Canyonero!
12 gigs long, 2 gigs wide,
65 tons of Windows Pride!
Canyonero! Canyonero!
Top of the line in crash reports,
Unexplained reboots are a matter of course!
Canyonero! Canyonero! (Yah!)
I ran out of creativity here.
stop the FUD (Score:3, Interesting)
and yet. (Score:2, Insightful)
Oh I don't know... (Score:2)
It would have to be that fast (Score:3)
Yeah Right (Score:4, Funny)
It has their patented uber-cool ultra-wizzer-extra-special 128-bit extensions, and it also has an expansion port that you can slap an extra processor on in case AMD releases a 256-bit processor in the meantime.
This thing is going to scream, baby! It will plug into existing Slot-1 motherboards, and will be built on a 2 nanometer process.
Microsoft are believed to already have a version of Windows running on the beast, with their new 'WTF That's Friggin Incredible Mate' extensions that go hand in hand with Intels 'Fuck Me If This Isn't A Faster Chip Than AMD Has' architecture.
Wait a moment
Vapourware (Score:3, Insightful)
My feeling is that while Intel is probably less worried about the G5/PPC 970 as their marketshare is very small, but is more worried about the effect a successful Opteron could have on the market, on the one hand not needing special recoding for 64 bit apps (compatible to x86 32bit) and more importantly what the Opterons could do to the server market, causing companies to switch their 32 bit Xeon stuff to 64 bit Opteron with little effort and low price.
I seriously doubt that all of a sudden next year, CPUs will be on the market running at 5 to 7 GHz without having serious cooling problems or running away from memory.
So, in summary, I think it's Intel's marketing department in microsoft mode:Vapourware.
Re:Add-on module? (Score:4, Informative)
The clock speed hike reminds me that the P4 is slower clock-for-clock than the P3, and makes me wonder if Intel are doing this entirely for marketing reasons. I can't help feeling that they should start looking more closely at the other end of the market. Saying that 100W is acceptable in a desktop CPU does not make it so. For a large number of people 1GHz is fast enough, and a silent 1GHz chip would be more welcome than a 5GHz chip with a built-in tornado.
Re:Add-on module? (Score:2)
Re:No matter how fast it is (Score:5, Funny)
I'm waiting for the day that Microsoft Windows GUI will be fully raytrace/radiosity/photon map rendered.
I won't be happy unless I have a glass refracting mouse cursor made up of at least 64,000 triangles, updating at no less than 60fps. It had better be casting both a shadow and also focused light complete with chromatic aberation.
That'll show those OSX zealots!
Re:No matter how fast it is (Score:2)
I'm waiting for the day that Microsoft Windows GUI will be fully raytrace/radiosity/photon map rendered.
Huh, why settle for petty approximations like that. Just to give an incentive to MS, I'm not happy until the light-matter interaction between the light source and the cursor is given a correct quantum mechanical treatment! Of course, with todays computers that means something on the order of a CPU-year for every nanosecond time evolution in a system with 10-100 atoms. But who cares? You know, do some
Re:No matter how fast it is (Score:2)
Re:No matter how fast it is (Score:2)
Re:No matter how fast it is (Score:3, Funny)
Re:Erm... (Score:2)
Re:64-bit ADDON??? (Score:2)
Re:How many consumers will think... (Score:2)
Re:Come on... stop posting the Inquirer (Score:2, Funny)
Re:Some machines ready for P5 (Score:2)