Research Discovery Could Revolutionize Semiconductor Manufacturing 64
New submitter arobatino writes "A new method of manufacturing semiconductors which eliminates the substrate (in other words, no wafer) could be much faster and cheaper. From the article: 'Instead of starting from a silicon wafer or other substrate, as is usual today, researchers have made it possible for the structures to grow from freely suspended nanoparticles of gold in a flowing gas. "The basic idea was to let nanoparticles of gold serve as a substrate from which the semiconductors grow. This means that the accepted concepts really were turned upside down!" Since then, the technology has been refined, patents have been obtained and further studies have been conducted. In the article in Nature, the researchers show how the growth can be controlled using temperature, time and the size of the gold nanoparticles.'"
expect to be able to ... p-n diodes (Score:5, Informative)
That is like 1950's technology levels. A long time before they can make million gate devices.
There are many many problems associated with replicating sub-nanometer scale patterns on a ground flat substrate. If they don't have a planaer substrate they are going to have lots of problems creating the required imaging patterns. Note that at the current scales you can't print a | object as a simple | you have to make it look like an I, essentially doing what is called dog-boneing because of eteching and diffraction effects. And multiple parallel lines have big problems with diffraction effects.
So currently it seems without a substrate then can make ...... a single p- or n- type semiconuctor material that is unsuitable for anything else.
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Agree. It is much clearer to (drum roll) make the ellipses into drum rolls. Terminating Tadah's! can also add a sense of (drum roll) occasion. Tadah!
Re:expect to be able to ... p-n diodes (Score:5, Funny)
Eh, an ellipsis can be fine in the middle of a sentence. His sin is the number of periods.
There are three periods in an ellipsis. Three.
Understand, everyone? Three shall be the number of periods, and the number of periods shall be three. Four periods thou shalt not add, neither addest thou two periods, excepting that thou then proceed to three. Five is right out.
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Someone with mod points, plz mod parent up. It's funny AND true.
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84 days? (Score:2)
There are three periods in an ellipsis. Three.
Lemme see ... 28days X 3 ... an ellipsis is equal to 84 days?
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Tell me more about this porn-type semiconductor material. Do you have a link?
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gold is a contaminant (Score:2, Informative)
gold is a very severe contaminant for silicon, and many other semiconductors.
It sits energy wise in the center of the band gap and kills mobility with traps.
Gold is rigorously excluded from silicon FABS, not even let in the same room.
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Except when it isn't. It was used a great deal in the early years (1960s, 1970s ?) to improve turnoff time in diodes and TTL logic.
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Yep. Sometimes you want to introduce recombination centers to kill the lifetime. Nowadays they zap the wafer with radiation to do this.
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Re:gold is a contaminant (Score:4, Funny)
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I am curious as to foundries radiating their wafers to shorten the life of their products.
I think you misunderstood the phrase "introduce recombination centers to kill the lifetime". The lifetime being referred to is the lifetime of excess electrons/holes. So it's about speeding the devices up, not about making them fail at some time in the future.
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They use electron radiation. The radiation creates defects in the crystal lattice. Those defects act as recombination centers for holes and electrons. The increased recombination rate correspondingly increases the gain of bipolar transistors.
Like Tim the Gecko said, we're talking about carrier lifetime (Tau), not device lifetime.
Re:gold is a contaminant (Score:4, Informative)
Gold is rigorously excluded from silicon FABS, not even let in the same room.
Actually gold is the highest quality metal for bondwires or top-level bondpad metalization. You're right that gold is a severe contaminant, but it is also a very good conductor, and is easy to work with. It most certainly used extensively in fabs, although care is taken not to contaminate. I used gold interconnect in a chip just a few months ago, in a very up-to-date process.
The vast majority of chemicals used in a fab will severely degrade circuits if they are introduced into the process at the wrong time or in the wrong way. Gold is not a special exception here.
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If you are producing 1 billion SMD transistors a day then the few milimeters of gold wire in each transistor are starting to count.
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Most discrete wire bonding processes are moving from gold to copper. Not due to contamination, but due to cost. Gold costs E700 per km of 23 mu wire, copper costs about 70. Copper is difficult to master though.
If you are producing 1 billion SMD transistors a day then the few milimeters of gold wire in each transistor are starting to count.
I agree with you 100%. The original comment indicated gold is not used in semiconductor processing, and I was pointing out that was not true. Our stuff is lower volume so we're still using gold bondwires (can't justify the expensive equipment upgrade).
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Maybe this is why AMD is selling its huge campus (Score:2)
as described by Reuters at http://www.reuters.com/article/2012/11/27/us-amd-blackfriday-idUSBRE8AQ12I20121127 [reuters.com]
Well, you were wondering, right?
Right now "only" nano-wire (Score:2)
...but if they really manage to make circuits I am really impressed.
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Yes, it is.
The amount of gold this process would use (if it actualy created a circuit) is incredibly low (much less than the amount of silicon in a current chip), and gold is an order of magnitude cheaper than purified silicon.
Re:Is gold is cheaper than silicon? (Score:5, Informative)
a 200mm wafer is 0.775mm thick. A quick google says this is about $1200. I'm not sure when this was, but the price keeps dropping.
If you made a 200mm x 0.775mm gold disk, it would weigh 470g. The price of gold is currently $55.40/g. That's a $26,000 hunk of metal, 20x the price of silicon wafer.
Going on the 'order of magnitude cheaper' If a 200mm wafer cost $260,000 for 31,415mm3 of surface area it would be impossible to get more than 60 xeon 8800's (513mm2) (much less, since the die in a CPU is square so the edges re unusable and there is probably a need for cutting lines, not to mention yield), The raw die alone would cost $4,333.
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Here's a website with some numbers so you can make a proper comparison between the cost of silicon and gold: http://pvinsights.com/ [pvinsights.com]
Semiconductor grade polysilicon = PV Grade Poly Silicon
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Our foundry uses 200 mm wafers. I think the cost is around $20 per wafer. I don't know, because the substrates are so cheap, they don't even charge us. Epi is a little more expensive because of the extra processing -- maybe $50.
I imagine the cost scales with wafer diameter. 200 mm is relatively old technology.
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a 200mm wafer is 0.775mm thick. A quick google says this is about $1200. I'm not sure when this was, but the price keeps dropping.
Either that's old data, or the company selling the wafers was marking them up, or both. In my company's fab, 200 mm wafers cost around half that.
However, you are forgetting a crucial component: wafers may start that thick, but that's only for mechanical reasons. Prior to packaging the individual die, they get ground down to just ~100 um thickness. If they're growing individual chips instead of shuttling a big wafer around, then perhaps the gold layer only needs to be ~50 um instead of ~750 um. You also
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There is no reason that I can think of for the gold substrate to have any thickness as we commonly think of other than being able to physically handle the material. Gold has been beaten into leaf for 5000 year and goldleaf is 0.0001016 mm thick, I'm sure even that is thick compared to what they can do with gaseous deposition where layers thin enough to see through are common. All they need is something solid enough to grow some silicon crystals on.
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Do slashdot users have reading comprehension problems?
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Silicon prices keep dropping, and gold prices keep increasing... And my figures are quite old.
I stand corrected.
The first rule of semiconductor manufacture is... (Score:3, Insightful)
...if you believe your new process/material can be developed to the point where it can compete with traditional silicon devices and/or processing methods you are wrong.
Only if you have an application, such as LEDs where the laws of physics say silicon can't possibly compete is there any chance you will succeed. And even then the chances are you are still wrong.
namgge
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There will be at least one time that some other process came from nowhere and beat silicon litography in nealy all aspects. (The laws of physics almost assure that.)
The only questions are "when?", "what process?" and "will it come while we still have Moore's law?"
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" "will it come while we still have Moore's law?""
we don't have it now. Haven't for years. as a reminder: Double the transistors for half the price per cm2.
When was the last time the number of transistors per cm2 doubles in 18 months? 2203? 2004?
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When was the last time the number of transistors per cm2 doubles in 18 months? 2203? 2004?
Actually, it's every 2 years. The 18 month period was from David House and referred to computing power (due to the combination of transister count increasing and speed increasing).
And the answer to your question would appear to be 2011 [wikipedia.org] :)
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It's not per cm2. It's per chip. Highter yelds are also part of Moore's law.
The law is as strong as ever, and probably will hold until the next fabs generation (about 7 years). After that, it's only guesses.
Re:The first rule of semiconductor manufacture is. (Score:5, Informative)
There will be at least one time that some other process came from nowhere and beat silicon litography in nealy all aspects. (The laws of physics almost assure that.)
Not so sure about that. Lithography is one of the most highly developed technologies in the history of the world, and has gone far, far deeper than most people expected as early as the 1980s. Proposal after proposal has been made to replace lithography (e.g. e-beam, MBE, etc) but all have to relegated to niche status.
Semiconductor lithography itself is highly, highly leveraged from printing processes going back hundreds of years. With this much brain power and inertia behind it I would be really, really surprised if something beats it in "nearly all aspects". Some aspects, maybe, and lithography may finally hit a show-stopper, but there won't be an "oh my, what a breakthrough" type thing to replace it. I agree it has to be replaced to maintain Moore's law, but it is already beyond comprehension advanced.
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Not really (Score:4, Insightful)
> patents have been obtained
I guess it won't revolutionize anything after all; or at least not for another 20 years.
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Somewhat misleading headline (Score:5, Informative)
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Seriously that's not a problem, just send direct to a refiner/assay company like Garfield Refining [garfieldrefining.com] , they'll take anything except mercury, precious scrap metal, grindings, floor sweepings, vacuum cleaner bags, Dental labs and jewelry repair shop even rip up their carpets and send them in and frequently get a check back big enough to pay for the new carpet.
Components? (Score:4, Informative)
That seems much more feasible than what is implied by the title of this post.
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I'm getting the impression from the article that they are proposing to use this technique to build semiconductor *components* such as standalone transistors, diodes, etc., etc.
That seems much more feasible than what is implied by the title of this post.
They aren't really proposing much of anything. They are a bit like the guys working on GaAs and InP in the 1980s... once they got two transistors working on a single substrate they exclaimed "This will revolutionize microprocessors!". It didn't.
Standalone components are SOOOO cheap for the most part now, I wonder how they can possibly be displaced.
Possibly useful, but not for logic devices (Score:5, Insightful)
To understand what the big deal is here, compare baking cookies in your house to a fancy industrial setup: In your home oven you can bake around 20 cookies at once, and you have to put them on a tray. Meanwhile, an industrial bakery has one of those fancy conveyor belt ovens -- dough goes in one side, cookies come out the other, and the conveyor belt itself is the tray. The conventional fabrication process for metallic nanostructures is more like the home method -- you need a tray (usually a silicon substrate, because those are pretty cheap and extremely high-quality), and an reactor of some sort (in this case a really fancy oven that costs more than your car, but still an oven), and you won't be getting any nanowidgets until the kitchen timer dings.
What this will NOT be useful for is logic circuitry. This group has managed to come up with a pretty good method of manufacturing metallic nanorods. That's all well and good, but bear in mind that all of these high quality nanorods are not attached to anything, and not particularly useful in and of themselves. Perhaps they can make individual nanorods into diodes, but even if they do they're still left with essentially a disordered heap of unconnected devices -- try throwing ten toothpicks in the air and having them land in a perfect grid. Now do it for a billion tiny transistors. You may notice that this process does not scale well.
This manufacturing method might actually be more useful in the realm of optics. The real breakthrough here is the fact that high quality metallic nanostructures can be grown without a substrate, and can be grown quickly and continuously. Metallic spheres and rods are actually quite interesting at the nanoscale, and behave in very counterintuitive ways (for instance, suspensions of gold spheres take on very different colors when viewed with reflected vs. transmitted light (See for instance the Lycurgus cup: http://en.wikipedia.org/wiki/Lycurgus_Cup [wikipedia.org]). People are working away on using those properties to do something more useful than making a better shot glass (for instance, nanostructured metals show some promise at enhancing the efficiency of solar cells), and maybe this manufacturing method will help them out by bringing the cost of high quality research materials down.
Then again, maybe all we'll get is a few overblown press releases and another three weeks of this article on the front page at Slashdot.
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0. I forgot a sentence somehow. After the second paragraph, imagine I said "Conversely, the new method is like the industrial bakery -- there's a constant stream of nanowires being manufactured at high speed, and you don't have to wait for an oven to cool down, remove your wafers full of nanowires, then wait for the oven to heat all the way back up before starting another batch.
1. For some reason
OK, now how do I wire it to my board? (Score:2)
Does my board need to be suspended in a vacuum chamber with a free floating gas substrate so that I can connect this to the rest of the parts?