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Technology

New Photolithography Process 81

dragons_flight writes "Motorola has announced a new photolithography process capable of making chip features smaller than 100 nm, with the aim of eventually going as low as 13 nm. For reference, the current next-generation standard is 157 nm."
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New Photolithography Process

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  • Interesting links (Score:3, Informative)

    by The_Jazzman ( 45650 ) on Friday August 31, 2001 @07:19AM (#2238302)
    Here are some extra links for those of your interested in photolithography:

    developing photolithography [ieee.org]
    More of the above [ieee.org]
    Process description [infras.com]
    A summer photolithography project [doe.gov]

  • Might this mean that Apple could have the chance of playing the MHz game itself? They would of course have to subtly change their current advertising campaign...."Oops sorry we were wrong! MHz do matter after all. Silly us."
    Seriously, does the Motorola announcement say when we are likely to anything actually made using this new technique?
  • WOW!!!! (Score:1, Redundant)

    by delmoi ( 26744 )
    Incremental improvement in microprocessor technology!

    Film at 11!
    • This is a HUGE deal! .1 micron (that's 100 nm, folks) has been a limit for a long time. I remember reading an article in Science magazine when I was a freshman in high school (8-ish years ago) about the theoretical .1 micron limit and how it wasn't yet possible to make chips with a circuit path any smaller...

      This SERIOUSLY opens the door to whole new families of microprocessors...can we say "Terahertz"?
  • Intel P VI's and AMD K10's (or will they all be owned by M$ by then? "MS Processor 2004") will be small (and low power) enough for be to play Doom IV on my palm-equivalent with full 3D glasses!

    Cool!
  • Well now my 1,4Ghz T-bird is outdated before I've purchased it. Splendid! Someone turn on the brakes.

    High-tech brakethrough, YES!

    Seriously, this is good but how many years will pass before this will benefit me (in an economicaly defendable way?) They should shoot higher and release when finished. They've managed 100nm but going for 13, why not go straight for 13? At least in the end-user-market. (Maybe they are, yes probably)
  • by CrosseyedPainless ( 27978 ) on Friday August 31, 2001 @08:07AM (#2238387) Homepage
    Does anyone else find the phrase "current next-generation standard" strange? My parser's still balking at it.
  • So it says in the article.

    Could this announcement be to boost the share price?

  • by wowbagger ( 69688 ) on Friday August 31, 2001 @08:11AM (#2238404) Homepage Journal
    Being able to make "features" as small as 13 um (and remember, "as small as" means this is a lower limit, and includes all sizes larger than this, up to Ringworld and beyond....) does not translate into working transistors at this size. You start getting into quantum tunnelling through the gate oxide because it is too thin, you start getting into a very high on resistance because the channel is too thin, the interconnects start to electro-migrate at 1 volt, etc.

    Making small features is only a very small part of making a working chip.
  • by Anonymous Coward
    I would be interested to know just how much current you can push down a 13nm-wide metal track without overheating it. That parameter would (partially) determine the voltage at which you could run such a chip, right?

    Then, assuming that transistors scale down nicely by two orders of magnitude from the current state of the art, how much voltage do you need to bias them? Even on today's 1.8V ICs, you're looking at a gate-drain voltage of 0.6V -ish. Is this compatible with the requirement to reduce the operating voltage to avoid heat death?

    Etching really small things into silicon... good work, but I think there are many major engineering challenges to overcome before they can say "we've got a 0.001 micron process, ner ner ner ner ner". I shudder to imagine how many times they're going to have to revise their SCMOS design rules between now and then.

    Why do I get the feeling I'm spoiling this for everyone else? :-)
  • Whose "current next generation standard" is 157nm? Aren't the pentium IIIMs already at .13u (130nm)? Please do your research, yahoo. You'd think a "tech savvy" slashdot journalist would realize this. There are also companies that will release chips done in technologies below 100nm before 2005, so aside from the "13nm" process, which is as vaporous as a vicks rub, this is not newsworthy. They haven't even actually done the 13nm etching, "said in an interview that lines as narrow as 13 nanometers could eventually be etched on to chips".

    Mike
  • 4 years ago I saw a v-expensive setup at LUCENT called SCALPEL, which stood for Scattered Angular Limiting Projection Electron Lithography, which uses high and low Z (atomic number) materials to pattern flood illuminate electron-photo-resists down to sub 30nm. The question now is how do you dope at such scales ? a.k.a Quantum doping
  • by nan0man ( 518774 )
    For all who are interested in NGL techologies. NGL depends on three main components: 1. Stepper 2. Light source 3. resist/masks IBM plans to play in the resist/mask area. They used to work in the light source area as well, but dropped their development in that area. There are other companies like TRW, JMAR, Lambda Ph and others that are working on a light sources for EUV. One company - JMAR Techologies actually has solution for both EUV and X-Ray lithography. They have just demonstrated the results of their work to EUV consortium. (IBM and Intel are both part of it). There is a good chance that their EUV light source will be licensed by the heavyweights like Cannon, Nikon, TRW and others for use in the EUV steppers. http://www.jmar.com JMAR also just bought SAL Inc. (Semicon Advanced Lithography Inc) http://www.xraylitho.com SAL was a leading provider of X-Ray steppers in the world. Now JMAR is the only company in the world that has an X-Ray stepper and X-Ray source together. They will start selling it next year for production of GaAs chips (hi speed telecom chips are build from GaAs - optical routers, cable boxes, gigabit switches all use GaAs not silicon) Check out these links on EUV, X-Ray litho and JMAR in particular. Some links on IBM X-ray and EUV program here as well: http://www.siliconinvestor.com/stocktalk/msg.gsp?m sgid=16163743 Lithography is the fundamental process in producing semiconductor integrated circuits. It is a light-based projection printing method which transfers microscopic circuit design features onto semiconductor wafers that are then processed to convert those designs into precise microelectronic circuits. The lithography process determines the size and patterns of the microcircuits to be imprinted on the semiconductor chips. In general, the finer the circuit features, the shorter the distance the electrons must travel. Hence, the faster the chip operates. As current lithography technology reaches its limits, the semiconductor industry has been working ever-harder to stretch the capabilities of existing technology to create NGL systems capable of producing continued reductions in circuit size and improvements in performance in the most economical way possible. Originally called ``soft X-rays'' as a way to distinguish its 13.5 nanometer wavelength from an alternative ``regular'' X-ray lithography technique based on 1 nanometer X-ray light, EUV radiation has become a leading developmental candidate for powering NGL systems. For more than a decade, JMAR has led a pioneering effort to develop short wavelength light sources for advanced semiconductor lithography. The foundation for that program is JMAR's patented, all-solid state, high average-power Britelight(TM) laser technology which, when focused into JMAR's proprietary wavelength conversion system, transforms 9 percent of the laser's energy into the X-ray light needed for regular X-ray lithography (XRL). More than $35 million has been invested, to date, in JMAR's XRL program, which is targeted at installing an integrated stepper/source system at a gallium arsenide semiconductor processing facility in 2002. At the same time, however, when coupled with well-established wavelength conversion technologies, JMAR's Britelight(TM) laser systems can also readily produce a variety of other types of light spanning the spectral range from its fundamental laser light wavelength of 1.06 microns to the much shorter (hence, higher energy) EUV and XRL wavelengths. John S. Martinez, Ph.D., JMAR's Chairman and CEO noted, ``We refer to the broad band of light wavelengths uniquely generated by our Britelight(TM) technology as the 'JMAR Spectrum.' That spectrum provides the basis for a wide range of potentially important new products, one of which is an EUV source for advanced semiconductor manufacturing applications.'' In the early 1990's, JMAR demonstrated its first EUV generation system based on the company's lower-efficiency excimer laser technology and participated in a program funded by Sandia National Laboratories to characterize and study the EUV output of that system. Subsequently, JMAR curtailed further development on its excimer laser in favor of its much smaller, more efficient, and more reliable diode-pumped solid-state Britelight(TM) lasers, which it then optimized to produce X-rays. In late 2000, Harry Rieger, Ph.D., the creator of JMAR's world-leading Britelight(TM) laser technology and Edmond Turcu, Ph.D., JMAR's chief scientist and an internationally-recognized authority in the field of laser plasma X-ray production, initiated a company-funded program to determine the level of EUV generation obtainable by connecting an existing single laser module to a proprietary EUV conversion device developed in collaboration with a leading university research program. In a very short period of time, with relatively modest effort and expense, this laboratory system demonstrated an ability to convert more than 2 percent of its unoptimized laser energy into the portion of the EUV energy spectrum suitable for EUV lithography (EUVL). The mainstream EUVL technology now being developed by an Intel-led U.S. EUVL consortium, contains extremely delicate critical optical components that could rapidly degrade in the presence of contaminants such as those which might be produced by plasma EUV generation sources. Commenting on JMAR's recent EUV achievements, Dr. Turcu said, ``We regard the results of our recent demonstrations as an important breakthrough in EUV generation technology performance. The EUV demonstrations at JMAR suggest that the general configuration of our system has excellent potential to meet the minimal debris generation requirement necessary for our technology to be considered as the basis for a competitive EUV lithography (EUVL) system. ``We have initiated the design of a full-power EUV generator based on the direct scaleup of the system we have already demonstrated,'' Dr. Turcu added. ``This design includes certain obvious modifications of our Britelight(TM) lasers to optimize their ability to produce the higher laser power and better EUV conversion efficiencies to produce the 100 to 150 watts of EUV power required for the high throughput wafer processing that we believe is attainable with our technology. ``Contingent on the availability of adequate financing,'' Dr. Turcu continued, ``JMAR looks to have a prototype 100-watt EUVL source available before the end of calendar 2002, to be followed by a scaleup of the system to 150 watts six-to-nine months later.'' Dr. Martinez said, ``At an EUV Lithography Workshop in March 2001, attended by leading professionals in the field, Dr. Turcu, in response to institutional requests, disclosed a limited amount of information regarding JMAR's technical progress and goals for its EUV program. We expect to issue further announcements regarding our progress within the near future, as appropriate. ``I wish to reiterate that our Britelight(TM) laser technology, which is fully-patented was developed at JMAR over a period of several years,'' Dr. Martinez noted. ``Many leading laser and optical experts who have evaluated this technology have confirmed it to be the world's leading technology in its field. In Britelight(TM), we have achieved a high level of average laser power with almost perfect beam quality that enables extremely tight focusing of the laser beam with a simplicity that conceals the might of the underlying optical architecture. Although Britelight(TM) lasers can be used for less demanding and lower-value tasks, they were originally developed and optimized for very high-value energy conversion applications such as laser plasma EUV and X-ray lithography sources. ``It appears that, in many ways, efficient EUV generation from our modified Britelight(TM) (E) system places less demanding requirements on our laser architecture than those already met in the successful development of our Britelight(TM) (X) laser. Therefore, we are quite optimistic that, if the additional resources are available to do so, we should be able to move rapidly to demonstrate an efficient, cost-effective, full-power EUV source within a relatively short time. ``On the strength of our continued progress in refining our EUV and Britelight(TM) laser technologies, JMAR is currently conducting a series of discussions with U.S., European and Japanese companies and institutions to further explore and evaluate the feasibility and viability of potential alliance relationships for exploiting the full potential of our EUVL source technology.'' JMAR Technologies Inc., a semiconductor industry-focused company, is a leading developer of proprietary advanced laser, X-ray and EUV light sources for high-value microelectronics manufacturing and metrology. In addition, JMAR manufactures precision measurement, positioning and light-based manufacturing systems for inspection and repair of semiconductors and continues to play an important role in adapting its precision semiconductor manufacturing technology to the fabrication of advanced biomedical and optical communications products. It is also a fabless provider of high performance integrated circuits for the rapidly growing broadband communications market and other microelectronics applications.
  • "The chips would be created through a process known as photolithography, in which light is used to burn away excess silicon and create circuitry on the wafer.
    "
    Doesn't this make it sound like light is actualy burning the wafer? That is just plain wrong, light changes the chemical make up of phontoresist-- so it can be chemically removed... Duh...

    This just lends more credibility to the theory that if you know something about a topic you will see that the media has no clue about that topic...
  • I forgot about formating in my last post. Since I have no time to retype it all, I'll just post some links and let people who are interested to check them out: master link about X-Ray lithography, EUV, articles about companies that are involved in this field (it is heavy concentrated on JMAR techologies, since it is the only company in US which is going after X-Ray lithography. You'll be shocked to see how far they are in the process of producing a commercialy viable X-Ray stepper powered by a tabletop size X-Ray source. 1 nm wavelengh) http://www.siliconinvestor.com/stocktalk/msg.gsp?m sgid=16163743 JMAR Latest News http://biz.yahoo.com/n/j/jmar.html OE magazine article on X-Ray litho http://oemagazine.com/fromTheMagazine/mar01/x-rayv isions.html $7.8 million to ready its x-ray lithography http://www.jmar.com/jmar126.htm Article: JMAR to challenge EUV http://www.siliconstrategies.com/story/OEG20010417 S0023 Article on JMAR/Sal http://www.thetsector.com/printerStory.cfm?ts_stor y_id=1267 Website for SAL Inc (leading company in X-Ray steppers) http://www.xraylitho.com X-Ray litho article: http://www.semiconductor.net/semiconductor/Issues/ webexclusives/2001/200101/six0101pxl.asp article on EUV, X-Ray masks http://www.chem.wisc.edu/~lyang/Research/ X-ray Crystallography http://news.uns.purdue.edu/html4ever/9804.Crystall ography.html http://aj.encyclopedia.com/articles/14056.html http://www.infoplease.com/ce5/CE056531.html http://www.ccp14.ac.uk/ccp/web-wirrors/llnlrupp/Xr ay/xrayprimer.html
  • So, with 1 GHz G4s. The problem will be that they'll only get 1 useful chip per die, and the chip'll cost roughly $150,000...
  • Hint: Check facts (Score:1, Informative)

    by Anonymous Coward
    The article contains a serious error in that it compares the wavelength of the light used to etch the wafers to the resulting wafer feature width. These are, of course, related, but they are NOT comparable in the way the article implies.

    Motorola is claiming they can produce a 100nm feature size, with 13nm possible in the (presumably distant) future.

    The quote about the "next generation standard" being 157nm is in reference to the light wavelength, not the resulting feature size.

    If you intend slashdot to be respected as a technical resource (see disucssions from yesterday), then you need to do some BASIC FACT CHECKING before you blindly post a reference to an article that contains such flaws in its technical facts.

  • In the printed circuit board (PCB) manufacturing, advanced shops that do prototypes now use a laser photoresist depositor/printer (e.g., made by a company called Orbotech [orbotech.com]). I wonder if the new material Motorola developed will allow for even finer line width PCBs without resorting to lasers. I doubt that this will be portable to lasers. Does someone know what the physical limit of minimal line width is for a laser type printer?

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