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Rambus and DDR RAM writeup 51

jerkychew writes "Hannibal over at Ars Technica has written part 3 of his RAM guide,, this time focusing on the technical details of Rambus and DDR RAM. As always, a good (if compliacted)technical read. " If you're not scared of pin counts and parity, then this is a cool article.
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Rambus and DDR RAM writeup

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  • by Anonymous Coward
    I better patent the process by which air is drawn into the lungs before it is too late.
  • by Anonymous Coward
    Look up what a light-nanosecond is. Rambus is pushing up to clock rates with periods of near a nanosecond. This limits the upper physical dimensions of CPU + memory to about a light-nanosecond. With real electrical circuits the situation is worse than this, given unavoidable stray capcitance, etc. Already, serious timing problems occur between signals coming from the closest memory chip and the farthest. Is Rambus planning to develop a time machine?!

    Forget about using Rambus with much higher clock rates or for very large memories. Of course, they could achieve some performance increase by shrinking the physical size of memory. But this is impossible when Rambus already runs very hot, so hot that not all chips can be "on" at once. Maybe in a decade or two when process dimensions will shrink by an order of magnitude or so!

    Rambus proposes a double bank solution. Wait a minute, I thought that their original selling point was their 16 bit data path and the consequent low pin count. Wow, double banking means a 32 bit data path. I think that the Rambus engineers are doing the "double think" here. Why not just use a 64 bit wide data path like everybody else.

    Oh, I forgot, it wouldn't be Rambus any more then.

  • Doesn't this only work in a single processor system?
  • Okay, this is a replay to an uninformed post which is bordering on pointless, but let me clear some things up for you.

    1) This article was intended as humor. Obviously for a humor-impaired person such as yourself the subtlety of this fact must have escaped you.

    2) While this article does offer more hot air than previous posts, I still believe it is very funny. Obviously there are technical problems in compressing hot air, and we're working on them, but I still believe it is better than the use of cold-air in the post-modern 3rd wave era of bullsh*tting.

    3)AMD has nothing to do with this article. For that matter, neither does Rambus, DDR SDRAM, the pope, or my left over bag of doritos chips.

    4) It would take far less time if you would just start seeing things my way.

    5) This is where the reader stopped.

  • Sig11's RAM Guide
    -----------------
    (Note: This article has been reformatted to fit your screen, and editted for slashdot-PCness)

    Rambus - Evil standard put out by Intel. It's bad, really bad. You should never buy it no matter what. Why? Because Intel is an evil bad corporation that made lots of money. Buy AMD instead.. they, uhh.. made less money! Alternatively, buy the chips and drill holes in them to let out the evil spirits before use.

    SDRAM DDR - Horray! Our savior! This type of RAM has none of the evil problems Rambus has (which, for space, we are choosing not to reproduce said list of problems), and they're made by a bunch of l335 d00ds fighting the evil Intel empire. Nevermind that they're produced overseas in sweatshops like Nike shoes and the people on the assembly line deal with chemicals that could take the paint off your car in 5 seconds flat... they are l335!

  • Not sure on release time, probably fall/winter this year. But anyway, here is a preview [impress.co.jp] to get you salivating. Unfortunately it is in Japanese, but there are plenty of pretty pictures and graphs. Or you can work through the rough translation [teletranslator.com]. (If you are not using Mozilla, just ignore the XUL stuff it tries to download).
  • And in addition, Toshiba makes very little SDRAM and currently no DDR-SDRAM so agreeing to pay royalties on those two really doesn't affect them.

  • you'd see that i said it was broken, and it is :)

    sorry foolio, you fail!
    ...dave

  • thus my link :P i was gonna just link to part 2, but then i said what the hell and put 1 there as well.

    i'm not karma whoring :) i read the whole thing before, i'm just sharing so other people don't have to fuck around if they skipped part 2 before, or the entire thing,..
    ...dave
  • You probably just tossed all your cookies. (Wait a minute, that didn't sound right....) Slashdot uses Cookies to save your username and password, then matches that to their database for all the rest of your dynamic pages. Your computer isn't saving cookies, or just got rid of the one /. is using.
  • Yeah, yeah, yeah.... So I spelled Rambus wrong, AND complicated, AND made a bajillion other grammatical errors....
    I was all excited to see my posting on slashdot, until I read it and saw all the mistakes I made. Now I feel like a doofus :-)
    And, yes, I even used the preview button. Unfortunately, all I checked was the HTML formatting. Live and learn, I guess.
  • No need. Just login again and the cookie will be re-created.
  • Remember the article about Intel working on a serial protocol for displays, to replace AGP... and everything else they're trying to make serial...

    While in theory it does reduce complexity, there is a cost, as this article points out. And when you get down to it, RDRAM fits exactly into this category of "serial protocol"... basically it's making it go four times as fast down a pipe four times as narrow! Now, while Intel may be having second thoughts about this (internally of course), it still seems like another one of the serial protocols they're trying to promote, for better or worse.

    I just saw the connection and had to share it.


    -----
  • Put down the crack pipe, please. You look at the freaking spec sheet. For a single RDRAM channel transfering a 64Byte cacheline, you have a transfer latency of 40ns. aka, any given transfer will occupy 40ns. So in order to saturate the link you need to be able to transfer a cas in 40 or less ns. Considering they don't make parts with this high of a CAS latency, you're pretty much wrong.

    In fact, a single rambus channel has full CAS bandwidth down to a 16byte transfer size. After that you are limited by the CAS bandwidth.

    This is actually a lot better than some of the proposals for DDR-II
  • How do you explain that SDRAM can't saturate more than 1/3 of the P4 bus, but RDRAM can? The benchmarks on real systems are today's systems, but systems about to come out (e.g. the P4) have busses much faster (3x-4x) than what is out now, and will need RDRAM to keep up. That's what RDRAM is needed for. Save your benchmarks until P4 comes out (the first system to actually take advantage of RDRAM).
  • I'd say that's because it isn't a review. It's a technical explination of why Rambus is the way it is. The explination serves to shed light on what sort of goals were in mind and what sacrifices were made to get there. Combined with the first two parts of the series, and the rest to come, it's more of a history book than an editorial.

    Personally, I like seeing articles that are informative like this, without getting into a "which one is better" match. If people read them, and (gasp) learn from them, then they can be better informed to make their own opinion, rather than just "Rambus baaad! DDR goood!". I've made my decision (mainly though choosing the other chip), but it's interesting to read nonetheless.

  • See above. Thursday, the second part of the article comes out.
  • It's like Ars has been castrated. They didn't really make any commitments to talk about which they thought was better; The only time they really complimented RDRAM they said that it had better bandwidth than normal SDRAM but wouldn't mention DDR SDRAM at that point. They also said that RDRAM had some benefit or other, "But this has problems as we will discuss in our next installment."

    What pansies. If you can't say what you feel, then you have lost your ability to report the news. Tell us what we need to know, don't give us the marketing data. We can get that from the company webpages.

  • You obviously have no idea what source synchronous clocking is.

    You obviously have never heard of a wave-pipeline either.

    You obviously should not be posting to this thread.

    -bitMonster
  • Go back and try to read more of it.

    > 1) More parts (thus, higher cost)
    Wrong. You use fewer parts to get the same bandwidth.

    On the other hand, there is more logic on the die, so the cost is higher. It *should* be a very tiny fraction, though. The reduced cost of the packages due to lower pin-counts *should* offset this. We're all waiting on that....

    > 2) Only access 1/2 the banks of memory at a time.
    This is a minor issue, considering that you still have 4 times as many banks as in PC100/133 SDRAM.
    The memory controller needs to be smarter, though.

    Speaking of which, why aren't any of these PC-hacker news sites looking at why the Intel DRAM controllers suck so badly, and always have. Intel has traditionally optimized the price/performance of their chipsets for the desktop and value markets. Studying the specs on their SDRAM controller is considered a good baseline. As in, "Well, at least it's more efficient than Intel's." This isn't surprising to me, because everyone at Intel knows that MHz sells new {boxes|chipsets|CPUs}. I, on the other hand, would shell out money for a new chipset that increased DRAM efficiency by 20%.

    -bitMonster, who designs memory controllers for fun and profit. Well, mostly for profit. ;-)
  • Actually, only the Part II Page 1 'The DRAM "read" revisited' link is broken; all of the others work fine.

    -- Sig (120 chars) --
    Your friendly neighborhood mIRC scripter.
  • I am only going to start worrying if Rambus gets Micron or Samsung to pay royalties for DDR SDRAM. The rest are small potatoes.
  • Just don't ever misquote anybody in your sig. 'Los guyz' would be all over you for that.
  • Because I'm not aware of it. Alpha EV7, due out next year, will have a low-latency, very high bandwidth (12.8GB/sec) RDRAM implementation. The engineers designing that processor don't seem to be aware of the fundamental limitation that you claim.
  • I'm not claiming that RDRAM is the way to go for today's PC's and PC applications. Who cares how many milliseconds it takes to cut and paste in Word? I'm saying that today's high-end servers, and tomorrow's high-end workstations (and yes, eventually, your PC) are/will be severely bandwidth limited.

    A processor with an integrated RDRAM controller will be able to have low access latency and extremely high bandwidth (keep in mind that you haven't seen a processor with an integrated RDRAM controller, yet, so the current benchmarks should be taken with a grain of salt). The next generation of processors will have to use RDRAM to compete, because there isn't currently a good high-bandwidth alternative that scales.

    Would I want a PC with Rambus? No, not today and probably not for a few years. But servers and workstations are a different animal.
  • Yes, RDRAM transmits 16 bits at a time, but if you take 4 RDRAM channels, then you have 64 bits at a time, with 4x1.6GB/s=6.4GB/s of bandwidth, all with the same pin count as a system with a single 64 bit DDR-DRAM system (which will supply only around 2.1 GB/sec). Therefore, for the same pin count, RDRAM will give you 3 times as much bandwidth.

    As for latency, Intel did a poor implementation in which the memory controller was in the chip-set, and communicated with the processor over a standard bus. A better idea is to do what Alpha is doing, and place the RDRAM controller on-chip, which reduces the latency signifigantly.
    Asympotically, there is no comparison. Processors will get more and more bandwidth hungry, and RDRAM will always supply much more bandwidth than SDRAM for an equivalent pin count (because of the pipelined--optimized data path with synced clock). Latency will be corrected by better implementations (although it will never rival SDRAM). Latency to memory is not quite as important as everyone here would have you believe, and it will become less so as caches get larger and better.
  • You can easily saturate a RDRAM bus with a single processor if you are streaming data in (which is common in media happy applications).
  • While this article isn't perfect, it does give a good overview of the competing memory technologies, and doesn't cave to the predominant "Rambus sucks" slashdot mentality.

    As I've said many times in the past, in the future, memory will look more and more like Rambus and less like DDR SRAM.
  • in a distributed shared memory machine--where cache coherence is maintained with directories and dedicated inter-processor links, not with a snooping bus. There's probably a way to make it work in a snooping bus SMP system, it would be difficult, though. Very good question, Ben.
  • the limitations are not that big a deal. Yes, RDRAM will always be worse than SDRAM latency-wise, but not so much so that performance is compromised. If it were, then Alpha wouldn't do it because they aren't beholden to any RAM standard, and they have no designs on 'controlling' the memory industry, which people claim is Intel's reason for backing Rambus.
  • As I said in the conclusion, I'll be stepping back and forming some opinions closer to the end of the piece. And as jazzyfox has pointed out, the article is neither a review nor a performance comparison. It's a technical explanation of how two technologies work, their individual advantages, and their individual drawbacks. Whenever I make a comparison between the two, it's usually for didactic purposes and not necessarily so I can make a blanket call as to which one is "better."

    And as far as which one is "better" it all depends on the situation. (I say as much in my intro to the Rambus section.) Individual technologies are "better" or "worse" for _particular applications_. Depending on the constraints that you're operating under (cost, latency, bandwidth, availability, granularity, etc.) one solution will fit your needs better than another one.

    Yeah, sometimes it's easy to make a clear call on which of two similar technologies is better for 99% of the applications out there, like if you're comparing FPM RAM to EDO RAM. But Rambus is complex enough and different enough from DDR SDRAM to where it's not always a black and white issue. Rambus has advantages that make it better for certain applications, and DDR DRAM has advantages that make /it/ better for other applications.

    But again, there are no benchmarks in the article, nor will there be. There are plenty of places where you can find out how an RDRAM system configured a certain way stacks up against a similarly configured DDR DRAM system running a certain set of application benchmarks. I'd suggest you check out one of those to see which technology best suits your particular needs. If you're just curious about how it all works, though, I hope my article can be of some help to you.
  • DDr may be technically supperior to rambus but its dead out of the water. WHy then?

    one word, PATENTS!

    Rambus owns the intellectual property of virtually every syncronized ram chip in existance (including ddr)and also including a really scary patent on using a register to address memory!

    I know you guys probably just read the previous story here about a guy who now claims that internet stock transactions are his own personal property and the last thing you want to hear are more greedy corporations and whining but they are a real problem.

    The only reason sdram is still here is that rambus made it available cheaply now to show that there is competition to the fcc and also to highlight rambus as the next big thing. Rambus promissed no ddr ram chips in large qualitites would ever be introduced without big lawsuits.

    I also read a news article on zdnet explaining that the p4 will be rambus only.

    As the chip becomes standard expect ddr ram to slowly vanish and people will all forget about ddram since all the vendors like compusa and directwarehouse wont stock ddr because the demand will be too low (remember AMD hardly made a dent in intels armour. Many bussinesses only buy computers with intel chips).

    As soon as the ddr is made in smaller and smaller quantities the price to manufacter will go up making it even more expensive then rambus (remember rambus will sue othe memory manufactors unless its priced much higher then rambus. :-( ).
    Company officals admitted they will try this tactic to wipe out ddr.

    I believe sadly that amd's sledghammer will als be rambus only (correct if I am wrong guys. I would be happy if I was.). I thought I saw an article here on slashdot that amd finally gave in to rambus demands.

    Its a shame supperior technology will be blocked again.

    Remember to write to your politicians on patent abuse because its really hurting us.
  • you mean 'l337' don't you?

    Pope

    Freedom is Slavery! Ignorance is Strength! Monopolies offer Choice!

  • on ars (the ones at the bottom are broken and point to part III), so here they are :

    part I [arstechnica.com]

    and

    part II [arstechnica.com]

    these are really good, and very educational! :)
    ...dave
  • The slashdot crowd refuses to acknowledge that Rambus is actually a solid and viable memory technology (that's just a couple years ahead of its time).

    All the information I have read has pointed to the latency as a killing factor to RD-DRAM. While RD-RAM has faster access, it is only 16 bits at a time, which puts it with DDR-DRAM. If there is something that myself or others don't understand about RD-RAM which will make it better for future use could please allaberate more then just saying Rambus is actually a solid and viable memory technology? I have heard many techinical arguments against it. I am willing to hear arguments for it but I haven't heard any yet so if you have some please post them as I am more interested in the truth then in personal bias.
    Molog

    So Linus, what are we doing tonight?

  • OK, this is obviously an uninformed post which is bordering on Trollness, but let me clear up some things for you.

    1) Rambus is not a standard put out by Intel. Rambus is not even a standard at all. Rambus is a company which makes its money by licensing their intellectual property. Rambus Direct DRAM (RD-DRAM) is a standard put out by Rambus which outlines how to manufacture and communicate with their memory technology. Rambus licenses this to memory and chipset manufacturers such as Intel, NEC, and Samsung. FYI AMD also has a Rambus license, but they have done nothing with it.

    2) While RD-DRAM does offer higher bandwidth than traditional SDRAM, its implementation brings about a whole bunch of other problems. Neither RAM standard is perfect, however DDR-SDRAM has better performance than RD-DRAM in almost all scenarios, and it's CHEAPER because A) no licensing fees and B) it's very very similar to SDRAM so fabrication plants can simply modify their existing production lines instead of creating whole seperate lines for RD-DRAM.

    3) AMD has nothing to do with Rambus or DDR SDRAM. When you buy RAM you are not "buying Intel" or "Buying AMD." That's like saying you're "buying Honda" when you buy some Firestone tires that fit your Honda. [sarcasm]And of course we shouldn't buy Honda because they are an evil Japanese corporation, and Japan is where Pokémon came from, which is the spawn of Satan.[/sarcasm]

    4) Intel is pushing the RD-DRAM standard because of an agreement with Rambus which, if they can make RDDRAM successful, they get enormous amounts of Rambus stock. Basically Rambus bribed Intel in order to get their superior product out there so they could make more licensing fee money.

    5) Intel is NOT ALLOWED to market a DDR-SDRAM chipset for high-end desktop machines under the terms of this agreement. All this talk about Intel making a DDR-SDRAM chipset for regular PCs are foolish. They may try to produce a "server chipset" which supports DDR-SDRAM, but you will not see a high-end PC chipset from Intel which supports DDR-SDRAM. Note that the chipset must be made by Intel, that's not to say VIA or SiS can't make one. ;-)

    6) Rambus is produced in the same fabrication facilities as SDRAM.

    7) It's l337 or 1337, not l335.
  • RDRAM has a fundamental design philosophy that prevents it ever achieving the low latency or high bandwidth in practice that its spec sheets suggest. Improving the CPU/RDRAM interface will not change this simple fact. Benchmarks be damned ... just look at the datasheets.

    RDRAM is technology that was good in the mid 90s but which has been surpassed by DDR SRAM. Making DDR SRAM scale is a far simpler problem than making RDRAM efficient. People tend to solve the simpler problems first.

  • Multiplexing the row and column addresses over an 8-bit bus. Sure it makes board design easier, but it means your best-effort latency with 800MHz RDRAMs, is 5ns, IGNORING THE TIME IT TAKES TO PRECHARGE THE ROW. That's 50 cycles on a GHz CPU, just to get a command through the RDRAM architecture. The actual latency of DRAM is of course worse than this, but the RDRAM architecture adds this latency just to save pins.

    I'm sure the engineers designing the Alpha EV7 are perfectly well aware of the limitations of Rambus technology. Probably more so than I am.

  • No you can't. Read the freaking spec sheets [toshiba.com] for a real RDRAM. Look at the CAS-to-CAS time for a single bank and do the sums yourself.
  • As I said originally, I'm not interested in claiming Intel is "evil", I'm just interested in honest comparison of chip specs.

    Glad we finally got there. Whew! ;)

  • 40ns is the TRANSFER time, from which you calculate the total BANDWIDTH of the part. HOWEVER, if you're doing a bunch of consecutive transfers from the same bank, the CAS-to-CAS time is 100ns (this is the time from one CAS to when the next CAS can be accepted - nothing to do with the bandwidth of the command channel). Therefore, if you can only do one CAS per bank every 100ns and your transfer time is 40ns you can only achieve 40% utilization unless you have multiple reads outstanding at one time - which you don't on a PIII.

    Is that simple enough to understand, or is my crack-addled brain going too fast for you?

  • What, do you work for Rambus? ;) In this case (but not all cases!) the Slashdot mentality is pretty much on the money. Forget the fact that patents suck, or that Intel is "evil" - just look at RDRAM performance in real systems.

    I've been using Rambus parts for years (N64, now PS2) and the performance just isn't that great. Performance is what people like, not cool designs or easy board layout. The theoretical performance isn't even that important - it's the massive complexity of the RDRAM controller on the FSB which drags the actual numbers down. Add to that the fact that RDRAM bandwidth is only 1/3 of theoretical bandwidth even in the best case, unless you have multiple channels open simultaneously. Great for multiproc servers, perhaps, but lousy for singleproc desktop machines.

    So, I'd be interested to know, why do you think future memory will be more like Rambus and less like SRAM?

  • I'll wait for independent benchmark tests on the P4, thanks. The only way you can saturate a 64-bit, 400MHz bus using RDRAM is to have 4 chips running pre-requested consecutive accesses, and even then the bus load will be more like 83% because of bank switches. This is *not* a real benchmark.
  • Compliacted? Shoulda used the preview button.
  • I've read enough... I'm just waiting for DDR SDRAM mobos to come out! Anyone have any ideas on how soon VIA and ASUS will be bringing something to market?

    Vote [dragonswest.com] Naked 2000
  • The slashdot crowd refuses to acknowledge that Rambus is actually a solid and viable memory technology (that's just a couple years ahead of its time). We'd rather just rant and rant about DDR is great and Intel sucks and Rambus is a fascist organization, yadda yadda yadda. Pack up your reality and go home.
  • by ascheuch ( 30478 ) on Monday August 28, 2000 @07:55AM (#821742) Homepage
    I think the biggest problem with DDR SDRAM is the lawsuits. According to this article: http://www.tech-report.com/news_reply.x/882,

    June 16: Toshiba signed agreements with Rambus, Inc to pay Rambus royalties on SDRAM and DDR RAM based products. This development has the potential to seriously shake up the memory market. Toshiba has just set a precedent, and basically sold out the rest of the world's memory manufacturers.

    Basically, Rambus is making Toshiba pay huge $$$ to make and market DDR SDRAM. In that article, it states that the royalty rate is even higher than RDRAM. (which we all know is way overpriced!)

    Later on in the month, The Register ran this article: http://www.theregister.co.uk/content/3/11576.html

    This one is by Hitachi which is counter suing Rambus stating they have an unfair monopoly on memory. Now I'm no lawyer, but reading these articles ... I get very angry at what Rambus is trying to do.

    Taken from the register piece:
    Hitachi admits that the '804 Patent was issued to Rambus on September 21, 1999, and is entitled "Synchronous Memory Device Having An Internal Register."

    There's more legal stuff in there ... but basically these lawsuits need to be cleared before companies will invest in mass production of these chips.

    :P
  • by Mark F. Komarinski ( 97174 ) on Monday August 28, 2000 @07:54AM (#821743) Homepage
    My (quick) reading of the article indicated that RAMBUS does have a few problems:

    1) More parts (thus, higher cost)
    2) Only access 1/2 the banks of memory at a time.
    3) RAMBUS claiming patents for SDRAM production doesn't make their case any better as well.

    That being said, will RAMBUS (aside from the political issues) give better performance..say...5 years from now, when we all have 2Ghz machines running with an 800Mhz FSB motherboard? Some of what I've seen implies that the performance is really nasty right now, but in a few years when CPU and FSB speeds increase, it could pick up more performance.
  • by ackthpt ( 218170 ) on Monday August 28, 2000 @08:29AM (#821744) Homepage Journal
    A follow up I found on The Register [theregister.co.uk], so at least ALi and IWill are in the hunt, preview boards out early fall... sigh. Gonna be a long wait until Christmas, I guess.

    Maybe I should just tighten the belt and go for the 1040MHz Alpha [theregister.co.uk] (w/DDR, AGPx2)

    Vote [dragonswest.com] Naked 2000
  • Here's the dirt:

    Rambus is a member of the JEDEC, a committee of Semiconductor manufacturers which was created to help set standards for different types of chips. All the major manufacturers are JEDEC members, as well as other companies including Intel and Rambus.

    One of the agreements to joining the JEDEC is that you must disclose all patents, finalized and pending, to the committee and you may not withhold such information, or use information gained in the JEDEC forums to file your own patents.

    Rambus decided not to follow the agreement, and instead filed a patent during the SDRAM standard negotiations which would attempt to patent the exact implementation of SDRAM which was being written up. In the patent office, if your patent is not granted you can get extensions on it by modifying it. So what they did is continually string the patent along for several years, modifying it slightly so that as the SDRAM (and later DDR-SDRAM standard) was finalized, their patent looked exactly like what the standard was supposed to be.

    Now the patent finally went through (god bless those morons in the patent office), and since everyone has implemented their RAM according to the standard, Rambus is suing them all for patent infringement.

    However, there is very little chance they'll win. First, they violated the JEDEC agreement. Second, there is certainly prior art. Third, there was a decision back in '96 (I think) against Dell Computer when they patented something which was the result of "An Industry-wide Standardization effort" where the courts ruled that their patent was unenforceable. This is going to happen to Rambus, as well.

    As for Hitachi and Toshiba backing down and paying license agreements there are specific reasons.

    After the settlement, Hitachi sold their RAM division to NEC. They don't have to deal with the problem now, and since NEC is incorporating Hitachi's RAM infrastructure into their own, the licensing agreements probably mean jack now.

    Toshiba, on the other hand, manufactures the RD-DRAM which is used in the PlayStation 2. They're making enormous amounts of money from this, and if they didn't agree to pay more licensing fees to Rambus, Rambus might pull their RD-DRAM license, thus forcing Sony to find someone else to manufacture the RAM.

    Hope this has been informative...

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