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Strained Silicon to Perpetuate Moore's Law 230

An anonymous reader noted a story floating around about a new technology known as strained silicon (or maybe 'Stained' since the article calls it both ;) which AMD & IBM figure will make CPUs 24% faster. A little bit on how it works as well, but not much substance.
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Strained Silicon to Perpetuate Moore's Law

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    • Re:More info... (Score:2, Interesting)

      by swordboy ( 472941 )
      Just a note,

      Intel has been using strained silicon since Prescott [hardocp.com]. They made the same claims before releasing it. But we can see now that it really doesn't make much of a difference so they're removing the emphasis from clock speed and optimizing for lower speeds.

      Nothing to see here. Old news.
      • Don't spoil my dreams of a G5 PowerBook using this with a slower clock speed to bring it up to the current desktop G5's speed damn it! :)
      • Re:More info... (Score:4, Informative)

        by leathered ( 780018 ) on Monday December 13, 2004 @04:37PM (#11076012)
        The news here is that IBM and AMD have perfected strained silicon with their Silicon on Insulator (SOI) process, an achievment that should lead to even better results than just strained bulk silicon.
        • by phsdv ( 596873 )
          yes, you are correct.

          This only shows that anonymous readers, that apperently do not even know how a transistor looks like, should not be allowed to post articles about Si or CMOS technology on /.

          I guess I have to say now: oh wait, this is /. to get moderated funny?

    • Re:More info... (Score:2, Informative)

      by ShadeARG ( 306487 )
      Why not just link to all Google sources [google.com] on this topic?
    • Re:More info... (Score:3, Interesting)

      by Bender_ ( 179208 )
      And a slight addition: It does not perpetuate moores law, it is just mitigating the problems that occured with gate dielectric scaling.

      Moore's Law requires constant downscaling of the gate insulator in the transistor. Recently the industry came to a point where the tunnelling current through the insulator became so high that it is not possible to make it any thinner. This problem can be counteracted by increasing the channel mobility using strained silicon.
  • by tubbtubb ( 781286 ) * on Monday December 13, 2004 @03:26PM (#11075355)
    Strained Si methods have been around for awhile. The PowerPC 970FX uses it, for example.
    This method (called DSL, or "dual stress liner", not only stretches
    the NFETs, it compresses the PFETs.
    See a better article here. [theregister.co.uk]

    Also, IBM is awesome.
    • It's distressed denim for all my CPU's. Or is it strained carrots? Whirled peas? Dangit!
    • My thoughts exactly. Why does strained silicon suddenly turn up as news? Perhaps the real news is about "stained silicon"? Perhaps it is just reposting Reg news without any editorial skill.
  • Hmmm (Score:4, Insightful)

    by Neil Blender ( 555885 ) <neilblender@gmail.com> on Monday December 13, 2004 @03:26PM (#11075356)
    24% does not perpetuate moores law.
    • Re:Hmmm (Score:3, Informative)

      by kenthorvath ( 225950 )
      24% does not perpetuate moores law.

      It does after about 3.23 iterations...

    • Re:Hmmm (Score:3, Informative)

      24% does not perpetuate moores law.

      Moore's Law [wikipedia.org] has nothing to do with clock speed.
      • Re:Hmmm (Score:2, Funny)

        by drMental ( 60513 )
        24% does not perpetuate moores law.

        Moore's Law [wikipedia.org] has nothing to do with clock speed.
        --
        Not everything is analogous to cars. Car analogies rarely work.


        To use an analogy. A car today with one engine will have two engines in 18 months and four in 36 months.
        • Replace Engine with Pistons or Horse Power and it makes more sense.
          • Re:Hmmm (Score:3, Funny)

            by Sique ( 173459 )
            So I bought my car five years ago with 81kW (113 HP), and I could have bought a similar car for the same price with an 162kW engine 42 month ago, and half a year ago I should have been able to get a 32-piston-648kW (904 HP) car for the same money?
      • Re:Hmmm (Score:3, Informative)

        by MagnusDredd ( 160488 )
        Replying to your sig:

        Actually car analogies can work.

        It's just that the wrong analogy is used. Clock speed is analogous to engine RPM. Further extending the analogy is IPC is equivalent to gear ratios. So my car at 3000 RPM may do 70 MPH in 5th gear, while a porche at 3000 RPM may do 125 MPH in the same gear due to the higher gear ratio.

        Most people can understand that some chips can do more per cycle than others (IPC vs. gear ratio), and that a certain number of cycles (Mhz vs. RPM) is not an indicato
    • Re:Hmmm (Score:3, Informative)

      by DLWormwood ( 154934 )
      24% does not perpetuate moores law.

      Yes, it does. But, only for about four months. Given that transistor density is supposed to roughly double every 18 months...

      0.24 x 18 months = 4 months and 10 days, or so

    • I think it does, because it could mean about 5 months' perpetuation.
  • by CdBee ( 742846 ) on Monday December 13, 2004 @03:27PM (#11075361)
    If you overclock any CPU by 24% it'll be strained.

    Or charred
  • IBM Does it again (Score:5, Informative)

    by Erect Horsecock ( 655858 ) on Monday December 13, 2004 @03:29PM (#11075390) Homepage Journal
    Strained silicon is not new tech, it's a couple of years old [macworld.com]. The idea (at least the way IBM does it) the silicon wafer is "doped" with germanium which causes the lattice of the Si atoms to spread out further which allows carriers to travel faster across the transistor.
    The germanium is removed to help improve power consumption even further and lower core temps. This is where the IBM and Intel process differ. Intel does not remove the doping material from the wafers, and well... We see how that has affected their CPUs at 90 NM.
    The new process only dopes the silicon under certain types of ICs and not others..

    Actually Zdnet [zdnet.com] described it better so I'll just quote them
    In DSL, different straining materials are applied to the top of the transistor layer and then etched away from where they aren't needed or from where they can even degrade performance. Materials that create tensile strain to benefit N-channel transistors are applied across the surface of the wafer; chemical etching then removes those materials away from the P-channel transistors.

    Subsequently, a layer of material for compressing the silicon lattice, which benefits the P-channel transistors, is applied and etched. The materials for straining N-channel or P-channel transistors can be applied in either order.

    "On the P-channel transistors, you want to increase the density of atoms because the holes can move more quickly," said Nathan Brookwood, an analyst at Insight 64.

    Kepler did not disclose the materials used but said they were fairly conventional nitride films and inexpensive. Plus, applying the straining materials after the transistor layer is complete is easier.


    If anything this will finally allow for a G5 Powerbook and a
  • by neomage86 ( 690331 ) on Monday December 13, 2004 @03:30PM (#11075397)
    This technique will allow transistors to react 24% faster. That doesn't neccesarily translate into faster cpus. For example, if this makes transistors run hotter, they will have to lower density. Furthermore, Intel already uses a version of this.
    • MOD PARENT UP! (Score:5, Informative)

      by PaulBu ( 473180 ) on Monday December 13, 2004 @04:22PM (#11075886) Homepage
      Conventional processor speed it determined by the RC constants of its longest nets, not that much by the transistor speed. Your average FET can amplify signals in ~10 GHz range, and a bipolar -- GaAs, InP, SiGe -- transistor works just fine up to almost a 100 GHz, but it does NOT translate into digital processing clock speed much above 4 GHz, all due to wiring and its RC.

      Paul B.
    • You are wrong. This technology reduces the resistivity of silicon, allowing for smaller transistors, and therefore, more transistors per chip. This means that clock rates overall may be increased. It is true that intel already uses a version of this technology, but that's hardly relevant, since IBM does as well.
  • By no means new (Score:4, Insightful)

    by brucmack ( 572780 ) on Monday December 13, 2004 @03:30PM (#11075405)
    This technology is by no means new... It's in both Intels and AMD's 90 nm offerings, and it has been discussed for years.

    This [anandtech.com] is a good article (from 2002!).
    • Re:By no means new (Score:3, Interesting)

      by hawkbug ( 94280 )
      Not really... read it again, they talk about removing the stuff from the new CPUs for AMD and IBM. From what I understand Intel does not remove it.
  • by RandoX ( 828285 ) on Monday December 13, 2004 @03:32PM (#11075419)
    There has to be an implant joke in here someplace...


    //Yes, I know silicon != silicone.
  • It's strained (Score:5, Informative)

    by jayteedee ( 211241 ) on Monday December 13, 2004 @03:33PM (#11075429)
    It's strained silicon which gets it's name from stretching the silicon.

    http://www.intel.com/labs/features/si12031.htm [intel.com]

    http://www.research.ibm.com/resources/press/strain edsilicon/ [ibm.com]
  • by mc6809e ( 214243 ) on Monday December 13, 2004 @03:33PM (#11075434)


    The time it takes for a signal to propagate down a wire is now much more important than it used to be.

    A 24% increase in transistor speed is not going to instantly create a 24% faster processor.

    Slow wires (relative to transistor speeds) will soon dominate.

    • Hmmm i can imagine a dialogue between a the wires and the electrons in a chip.

      Electrons:Look! strained silicon! SUPER SPEED! 24% w00t!

      Wires: NOT SO FAST!
    • You're quite right.

      Light can only travel around a metre during the tick of a clock on a 3GHz processor. Electrons are significantly slower than that.

      Wire delays already dominate. The next big thing may be unclocked designs (although faster transistors will always help!).
      • ... your numbers are the other way around!

        In 1 ns (1GHz) light travels roughly a foot (1/3 of a meter) in air or low-Er coax. In 0.3 ns (3 GHz) it's 10 cm -- see, an order or magnitude! ;-)

        But as I pointed out couple postings above and what teh GP I think had in mind was not speed-of-light limited communication latency, but RC delays of (non-matched) metal wires.

        And it does not really matter how fast electrones move on the wire (though it matters inside transistor gate) -- you are limited either by speed
  • by Grey_14 ( 570901 ) on Monday December 13, 2004 @03:34PM (#11075435) Homepage
    It Really really makes me sad, to see CmdrTaco making a jab at someone elses spelling error...
  • by Anonymous Coward on Monday December 13, 2004 @03:35PM (#11075448)
    What AMD & IBM and all other manufacturers failed to realize is that to generate sales, you don't have to make CPUs 24% faster, but to make CPUs in pretty colors and different shapes. A processor with flashing neons while playing a cute little tune would become the next big thing. Add to this the ability to play games and watch videos directly on the processor and you are on your way to richness.
    • Because that works so well for the Mac ;)
    • A processor with flashing neons while playing a cute little tune would become the next big thing.

      The next big thing? I read on /. that they were going to stop production of the Pentium II. I assume this means that the moon suit disco parties are going to end.

    • IBM went multi-colored back in 1970-71 when the 370's came out. Before that they were blue only. They had pink, blue and what other colors I can't recall, but it was a big deal back then.
      • IBM went multi-colored back in 1970-71 when the 370's came out. Before that they were blue only. They had pink, blue and what other colors I can't recall, but it was a big deal back then.

        The other colors were probably harvest gold and avocado green.

  • by flaming-opus ( 8186 ) on Monday December 13, 2004 @03:37PM (#11075472)
    Strained silicon is a great technology. you get 30% (or whatever) better electron mobility, which makes for faster capaciter discharge, and thus faster transister switching, and reduced heat generated in the process. However, you can't strain it much more than they already have. It bought the lithography folks another few hundred megahertz, but it's not going to keep moore's law alive for another couple decades, at least not by itself.

    Strained silicon doesn't really address the two big problems facing silicon lithography: leakage current, and the ever rising costs of dynamic power costs. Even with strained silicon there are still hundreds of millions of capacitors, each charging and dischanrging billions of times a second. If the frequency increases by some number X and the number of caps increases by some number Y, you have to drop the charge on each cap by X*Y or the dynamic power usage goes up. Furthermore, leakage current, which used to contribute almost nothing to the energy needs of a CPU, now makes up a good percent of the electrical and heat budgets. The drains are just too close to the body. There are too few atoms of semiconductor to act as a resistor.

    It's a nice one-time speed bump, but it does solve the hard problems, just puts them off for another year.
    • Oops. -DOESN'T solve the hard problems, just puts them off-
    • "It's a nice one-time speed bump, but it does solve the hard problems, just puts them off for another year."

      I think that's kind of the point to ML. After all, if we suddenly discovered a way to increase density by 10x, then we'd have defeated ML.
    • It bought the lithography folks another few hundred megahertz, but it's not going to keep moore's law alive for another couple decades, at least not by itself.

      This has been true for every innovation since before Moore first made his observation that is now known as Moore's Law.

      To get a 100% increase in transistor count (or popularly and probably more relevently, processor performance) every 18 months has required numerous individual ideas, each of which is worth a one-time-only boost of 30%, 20%, 10%. H
  • by Anonymous Coward on Monday December 13, 2004 @03:38PM (#11075475)
    *If* this is a strained-layer-superlattice, the technology is at least 20 years old, having been used in Solar Cells in the 80s (see nrel.gov ).

    Alternating thin layers of different lattice constant materials can change the semiconductors properties, in particular, the bandgap. It is possible to turn Si into a direct-bandgap material (like GaAs) this way.

    The problem in large scale mfg (back then) was eliminating crystaline defects.

  • Durability? (Score:3, Insightful)

    by rewt66 ( 738525 ) on Monday December 13, 2004 @03:38PM (#11075478)
    "Strained" is exactly that, the silicon lattice is under strain. What does this do to the durability of the chip? Does it make the chip more subject to breaking from physical shock (dropping your laptop, for example)? Does it make the chip more subject to failure from the stress of power-up?
  • Science & Vie [science-et-vie.com] has an article on a new form of carbon that might replace silicon.

    I have the paper edition here... professor Andre Geim scraped a small slice of graphite until he got it down to just one atom thick... it's called "graphene" (in French), for which he discovered interesting properties.

    This material was already known, but its properties unknown because previous methods of making it produced unstable graphene.
  • by StandardCell ( 589682 ) on Monday December 13, 2004 @03:46PM (#11075552)
    The major Electronic Design Automation tool vendors today have yet to come up with effective ways on how to design with and verify very high gate densities devices on the digital side. If you think that 90nm is easy, ask Intel's Prescott core team on why they think 100W out of a processor is "normal". It's not just power, for example, but clock/power gating melding efficiently with the functional aspect of the design. Power analysis and signal integrity (i.e. crosstalk) design flows are only getting more and more complex, and more designs require respins to the tune of almost a million dollars per mask set.

    Let's also not forget the analog world, since analog CMOS is notoriously difficult to design linearly across +/- 10% voltage ranges and through temperature and process variations. The problem was bad in 0.18um, very bad in 0.13um, awful now in 90nm and a nightmare in 65nm. All the secondary transistor effects that affect the usually "normal" operating points of logic gates only make things worse for the analog and mixed signal designers. This is not only for integrated analog and mixed signal interfaces but also for on-chip phase/delay lock loops and other assorted necessary goodies.

    Nobody has the design expertise or the tools to effectively model all of these phenomena and get them working as efficiently as they'd like. In my experience, it's more of a hack and check mentality that is increasingly pervasive. Once you've stuffed so much analog and digital together, trying to functionally verify it to a particular degree of certainty is a major hassle. Data sets are getting astronomically larger, and simulations are still AFAIK not able to be multi-threaded, leaving you at the mercy of your computing power. Sure, you can use strained silicon and SOI to help you out, but you can't ignore the rest of the design issues because they will only get worse. This is where the EDA tool vendors like Cadence, Synopsys, Mentor Graphics and the rest of them need to come up with some more innovative ways of doing business. Otherwise, we'll have a lot of technology that is manufacturable but cannot be designed with.
    • A long time ago, software programming was done by people with some exposure to electrical engineering and specifically computer hardware. But from there programming became increasingly messy, less of a science. Lisp lost to C, then C++, then Java. Software Engineering has become an oxymoron; Cutler's latest Operating System has become WinXP and the situation you describe for hardware is the norm for operating systems. It would not surprise me if hardware industry becomes more infected by the "hack and ch
    • Simulation time is a major pain. Separate simulations using different process parameters can be run at the same time on separate machines, if you have enough software licenses.
    • I had a teacher who told us that Cadence and the others spent extremely much money on research during the dot.com boom, then when the downturn hit they had to shelf a lot of that research. Hopefully now that the economy is picking up they will be able to conclude their research.
  • Summary: (Score:4, Funny)

    by pb ( 1020 ) on Monday December 13, 2004 @03:53PM (#11075610)
    1. Note that strained silicon is already in use.
    2. Extra nerd points for quoting what Moore's law *really* states!
    3. [...] No profit for you!
    • " 2. Extra nerd points for quoting what Moore's law *really* states!"

      This question is predicated on there being an official "Moore's Law". There isn't. Just a lot of paraphrases of a prediction Gordon Moore made back in the 60's that should the trend at that time continue, computing power would double every year.


      Do I get double extra nerd points?

  • I think I'd hate to be called Chip.
  • What ever happened to the idea of using a diamond substrate for chips instead of silicon? I remember reading about this 6 months ago: some MTI group were perfecting a system that could manufacture diamonds in a high-temp/pressure chamber, cheap enough that it would be viable to use instead of silicon. The diamond was supposed to have much better thermal properties and allow much faster chips....
    • It's a WIP
      It's a deposition from plasma process and grows up and out.
      In order to run on say a 3" fab line you need 3" wafers. The WIP is growing the 'seeds' to the point that they are large enough to grow cylinders from. It's pretty slow but will speed up once they reach 3". Once you've gotten to 3", then the 'seeds' will be sliced off. After that, it's exponential scaling as each 3" dia becomes thick enough to cut off a new 'seed'. Most of this stuff will be going into 'black' projects for the first few
  • by rkischuk ( 463111 ) on Monday December 13, 2004 @04:09PM (#11075757)
    Speed increases in processors have nothing to do with Moore's Law, which predicts the doubling of the NUMBER of transistors in integrated circuits every two years.

    Is it an interesting technology that we'll benefit from? Sure. But the mention of Moore's Law on this topic is just plain careless.

    • Moore never invented a law. He made a prediction about transistor density. This has been extrapolated into a law, which we've named after Moore, which generally states that computer equipment improves on virtually every numerically measurable front at an exponential rate. So a reference to "Moore's Law" is entirely appropriate.
  • It used to be interesting to read about advances in fab processes and the like. Maybe it was because the effect of a new process looked to help out all those futuristic stuff that just needed more power. Maybe it was that we were all focused on HW and the screwdriver work that was a big part of any IT job. Well whatever it was, its long passed.

    When you can go out and buy a new computer for $400 that would blow the doors off any 5 year old system and you can't come close to using your computers power exce

  • by NickDngr ( 561211 ) on Monday December 13, 2004 @04:26PM (#11075912) Journal
    CmdrTaco is pointing out someone else's spelling error. The end is near.
  • "a new technology known as strained silicon (or maybe 'Stained' since the article calls it both ;) "

    Since when did Slashdot editors start editing other people's articles?

  • Anyone else remember (Score:3, Informative)

    by Kithraya ( 34530 ) on Monday December 13, 2004 @04:43PM (#11076089)
    one of the last episodes of Geeks in Space where this got mentioned as a submitted (but rejected) story? Looks like the submission approval process is taking a little long these days...
  • 24%? Oh, come on. (Score:3, Informative)

    by Spy der Mann ( 805235 ) <spydermann.slash ... com minus distro> on Monday December 13, 2004 @04:47PM (#11076141) Homepage Journal
    Think about 10,000% [eurekalert.org] faster, or even more [technologyreview.com].

    Strained silicon is just one of the last tweaks of the silicon era. The future is either carbon, or optics.

    I'm not saying that 24% isn't good (it is). But rather that it's just a short-term achievement.
  • I am not talking about quantum but optical.

    I hear no mention of it. Optical is fast and energy efficient.

    I also don't hear much about spintronics.
  • Strained Silicon is one of the three, relativly new, big processing technologies that makes chips go faster without changing any of their design. I say relativly new because, as someone mentioned before, they have allready been used on some PowerPC chips.

    The two other main technologies are Copper wiring (used by intel since the coppermine PIII 800Mhz) and something called silicon on insulator or SOI. SOI is, to the best of my knowledge, only being used at IBM for the G5s but I could be wrong.

    Instead of us
  • Strained Peas to Perpetuate Bland but Nutritious Baby Food.

    (sorry, got nothin'....)
  • Why is it necessary? (Score:4, Interesting)

    by Dan D. ( 10998 ) <duhprey@@@tosos...com> on Monday December 13, 2004 @06:05PM (#11076850) Homepage
    It seems to me that if we finally stopped trying to eek out every last ounce of power from a specific technology that the industry might finally have a chance to mature to an unprecedented level.

    I mean, lets say things just suddenly stop and say 10ghz is the max chip speed and every other thing intel tries explodes the chip within 10 seconds. So maybe intel folds because of that (I'm a bad american... I really don't care about a companies right to profit. (i also have corporate grammar)) But some other chip maker can then take this speed limit and generate a process to develop that chip for extremely low level costs. Or maybe other people come along and argue for power and heat friendly chips which are only slightly less than the upper bounds.

    Then us software people start to run out of the excuse of "Hey, you should upgrade, then it'll run faster." And we can get down to the business of making the software just work correctly without having to worry about the next big thing we should be taking advantage of (sadly Game devs are still screwed for many more years.) We might even take the time to build software to eek out every possible advantage from the cpu ... you know ... back like we did when we thought 640k would be enough for anybody.

    Then give it a few years... say 50. And suddenly bio computing or quantum computing takes shape and a new industry of chip design is born and bolsters us into the next phase... but in the meantime we've done a good job of building a nice little base in the phase we are in. Use it as a benchmark against the designs of the next phase.

    I guess I don't see hitting this wall a bad thing. It seems that knowing there's a wall in front of you stimulates more in trying to get around the wall than seeing an endless open field does in making you feel like you might as well just sit down and take a breather.

    • Things will slow down sooner or later, but frankly I'd prefer later. As long as we have the luxury of doubling performance every few years I say lets do the most we can with it.

      Eventually things will settle down, and people wishing to perform even greater computational feats will be pining for the rapid technological pace we have today.

      In any case there's no use fighting progress, and if the market truly decides to demand stability over performance products will be made available. it's already ahppening a
  • I think that's proof Moore's Law is dying. Once upon a time anything that didn't promise at least a factor of two in performance over time didn't excite anyone but fab tech freaks.

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