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Technology Hardware

Engineers Create Tiny Wires WIth Old Technique 27

Gamp writes with this interesting snippet: "As microprocessors have shrunk, the wiring between them hasn't always kept up. But engineers at the University of Illinois are changing that with a decades-old metalworking technique. It's called electrodeposition. It's basically the same process used in electroplating, but instead of depositing metal on a surface, as when trying to make a gold-plated piece of jewelry, the metal is deposited in a wire. 'People weren't thinking about how to fabricate a wire in three dimensional space,' said Min-Feng Yu, a professor of mechanical science and engineering."
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Engineers Create Tiny Wires WIth Old Technique

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  • Any impact on Moore's Law?
    • by JoshuaZ ( 1134087 ) on Saturday July 17, 2010 @02:13PM (#32938262) Homepage

      Any impact on Moore's Law?

      Well, according to TFA:

      Scaled up to industrial size, the method could save microprocessor companies a lot of money, Yu said, because about 30% of the space in a microchip wafer is taken up by the wires between components

      Given that, I'm going to tentatively answer your question with a "yes."

    • by Trepidity ( 597 ) <delirium-slashdotNO@SPAMhackish.org> on Saturday July 17, 2010 @02:14PM (#32938266)

      Technically a bit different issue than the way Moore phrased it, but conceptually could have some related effects. Moore was predicting an increase in transistor density of integrated circuits (ICs), while this work scales down the size of interconnects between separate ICs. That could have the same effect of increasing overall transistor density for an electronic component, but is a somewhat different than increasing transistor density within a single IC. For example, it won't allow CPUs to pack transistors more densely, because CPUs are already a single IC.

      • Re: (Score:2, Funny)

        by Anonymous Coward

        Oh IC now.

      • Also wouldn't seem practical to move a 'copper-printing pipette' around a silicon die to lay all the copper interconnects, unless you could have hundreds or thousands of such pipettes doing that simultaneous (still not efficient compared to existing methods I'd guess).

        But perhaps a nice technique for silicon pad <-> I/O pin wiring. If result would be a stronger bond than what's currently done, perhaps that could improve reliability for some IC package types. And of course die-die interconnects for mul

      • Re: (Score:3, Interesting)

        by smallfries ( 601545 )

        It could be more tightly related than that, but it depends on how scalable and reliable it is. Rather than predicting an increase in transistor density, Moore actually predicted an increase in transistor density at a fixed price-point. This is the same as a reducing price-point for a given transistor budget.

        So one way to increase power would be to assemble processors out of smaller units. If each unit is an IC with a fixed transistor budget and this provides a reliable and scalable way to assemble those IC

    • Re: (Score:2, Informative)

      by Jeprey ( 1596319 )

      As someone actually deep in the industry (rather than speculators and wannabes), specifically to density and Moore's Law, I'd say not so much. Reason: electromigration. It's electromigration that defines design rule line widths for metal in microelectronics.

      The researcher (like most/many academics) is clueless about real life applications and doesn't really understand the driving factors of the technology he claims this could replace. I.e. he's pulling masturbatory fantasies out of his ass when he tal

  • by Trepidity ( 597 ) <delirium-slashdotNO@SPAMhackish.org> on Saturday July 17, 2010 @02:10PM (#32938252)

    I hate it when news articles don't either link to the original scientific paper, or at the very least tell me what issue of what journal it was published in! Given the state of journalism-about-scientific-research, I like checking up on the original paper, either for more details, or for a better "related work" section (often the actual papers will be much more honest than the press releases about which parts of the work are new and which parts aren't, and how it relates to existing work).

    Anyway, it's this:

    Jie Hu and Min-Feng Yu (2010). Meniscus-Confined Three-Dimensional Electrodeposition for Direct Writing of Wire Bonds [sciencemag.org]. Science 329(5989): 313-316.

  • by simula ( 1032230 ) on Saturday July 17, 2010 @02:18PM (#32938298) Homepage
    For anyone interested in seeing what the results of this technique create, check out the NewScientist article that covers the same topic:

    http://www.newscientist.com/article/dn19181-growyourown-approach-to-wiring-3d-chips.html [newscientist.com]
    • Are we going to start installing cube-like processors into our motherboards in the future? That would honestly be pretty cool, but it'd probably require different ways to cool the chips rather than simply pasting a cooling assembly on top of them.
  • It sounds like this might be another step forward for self replicating 3D printers. [slashdot.org] The best 3D printers print all of the plastic components to produce more 3D printers, but they are not yet able to print some of the necessary electrical components.

    -

  • Comment removed based on user account deletion
  • There's an "oldest profession" - "tiny penis" joke in here somewhere.
  • I'm sorry for being meticulous, but there's an error in the title: Engineers Create Tiny Wires W I th Old Technique.
  • This tech is outdated. Most chip mfg use solder balls en lieu of wire bonding. Wire bonding take too much time. The copper used inside/on the die is electroplated. This tech is not directly useful to most IC manufacturers. Perhaps it may be useful to a niche market.
  • "People weren't thinking about how to fabricate a wire in three dimensional space,' said Min-Feng Yu, a professor of mechanical science and engineering.". Yep. That's why wires have been two-dimensional up to now.

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