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On The Transmeta Patents 96

Ari Levien sent us an article over at CNet that talks about the Transmeta Patents and what they might be up to. You're never gonna believe it: a chip that will emulate the x86.
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On The Transmeta Patents

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  • Everyone assumed that this was to be the main processor of a PC or similar computer. This article implies that it may, at least, be a little better souted for other tasks - like routing. What if that's all it is?
  • > [...] a design to emulate a set of gates generally
    > uses more gates than the design it's emulating

    That's precisely the point I was making.

    > Not to mention the cost!!! Per gate, FPGA's
    > are more expensive to manufacture [...]

    Cost is a relative issue. Once a technology is proven viable and desirable, it can undergo iterations of streamlining, simplification, optimization, cheapification etc to reach a price point. Don't forget economies of scale. Still, a first generation product COULD be costly.

    There are many ways performance and cost could be optimized. By its very nature, an FPGA does not have to implement an entire CPU at once. It can selectively model the target CPU based on the instruction stream. Subsystems on a CPU often lie idle while others are performing work. An FPGA basically allows you to "swap in" CPU subsystems as needed. Of course, this interacts with pipelining etc in strange and wondrous ways, and is by no means an easy problem to solve. If it were, it would have been done a long time ago. Basically, a lot of the same issues of parallel processing have to be addressed.

    Still, Transmeta might just be the company that solved all the problems. Of course, I could also be way off, and they might be working on something entirely different. Like a Super-Aibo.
  • Remember, though, Linus is working there as well. Don't you think that the Linux port is already being worked on, in a porters dream enviroment, as he is working for the company making the chip. Obviously this probably isn't his primary concern there, but I doubt that the code isn't being written already.
    And when the chip is unveiled, just imagine it being on a machine running Linux.

    ----------------
    "All the things I really like to do are either immoral, illegal, or fattening."
  • It doesn't have to be very fast at all if the software can break up the instructions and send them to multiple processors. This way, it can be both cheaper AND faster than a state-of-the-art Intel processor (although it may be just cheaper per processor.

    As far as translating instructions, yes, almost all CPUs translate their "native" instruction set into the microcode which actually controls the CPU. Very few CPUs have the abilility to change that translation process, or change the microcode, on the fly.

  • Personally, I believe they're working on a meta-CPU which doesn't have a native general purpose instruction set of its own

    Personally, assuming the patents they've been getting are for ideas they're planning on using in whatever they make (rather than, say, ideas they came up with for a product they were working on at one point, but that they abandoned in favor of another product), I suspect they're working on a CPU that does have a native instruction set of its own, plus software to translate other instruction sets into native instruction sets, given that they talked about such translation software in the patent most recently mentioned on Slashdot (see my postings on the thread for that patent for quotes from that patent).

    I have seen nothing whatsoever to indicate that they plan to have the chips' hardware be reconfigurable to directly execute different instruction sets.

  • Will Transmeta produce the chip themselves, and start their own line of desktops, servers, laptops, etc?

    Just out of curiosity, how many vendors have in the past couple of years succeeded in coming out with a new chip with a new native instruction set, a new OS, and a line of computers based on those chips running that OS?

    If the answer is "none", or some very small number, this doesn't mean that Transmeta couldn't succeed at doing that, but it suggests that doing so might not be easy, and that the machines might have to have some major advantage over existing machines to convince people to buy them rather than, say, PCs running any of the N operating systems that run on them, or Suns, or HP-UX machines, or RS/6000's, or Alpha boxes, or....

    That, in turn, doesn't say that they're not planning on doing that, but it suggests that they might not want to be quite so ambitious, and might realize that, and thus might not be quite so ambitious.

  • The patents are just distractions.

    They are keeping the meat to themselves.
    Accepting that current processor deal with linear data. The Transmeta processor will deal with it in a planar fashion. Most of the innovation will be in the manufacture of a chip that can support such an architecture. The speed difference will be comparable to the differene between a bubble jet printer and a laser printer.

  • Now I don't think that the first iteration of merced is going to be widely adopted. But I think that the second will move it's way into the market extremely quickly and after that x86 is going to fade fairly rapidly.

    The fact that "the second [iteration of merced]" (Are you referring to McKinley here? "Merced" is the code name for an implementation of the IA-64 instruction set, as is McKinley; they're two generations of IA-64 implementation, not two generations of the Merced implementation of IA-64, as far as I know.) moves into the market quickly doesn't imply that "after that x86 is going to fade fairly rapidly". Fred Pollack's slides from the October 1997 Microprocessor Forum [intel.com] indicate that, at least at that time, Intel planned to continue IA-32(x86) development for a while; perhaps they've changed their minds since then, and perhaps IA-64 will be so successful that they quickly drop prices on IA-64 implementations and kill off x86, but I have no reason to believe that this is guaranteed to happen - IA-64 may well stay high-end for a while.

    I don't know at which market(s) Transmeta would aim the processors that they're presumed to be designing; it may well be that said market(s) will switch so quickly to IA-64 that x86 emulation is irrelevant to it, but I'm not about to assume that - and perhaps Transmeta aren't assuming it, either.

  • Problem there: "Rosetta" is the name of the Handwriting Recognition engine in the latter versions of Apple's Newton OS.

    Knowing Apple, they almost certainly still have trademark on it and wouldn't take kindly to someone else using it.

    --
  • The patent is not on a chip that translates instructions from one set to another

    Err, umm, perhaps that's because they're not implementing a chip that translates instructions from one instruction set to another, but are implementing a chip with hardware features to allow software to do said translation in an optimistic fashion, and to handle cases where said optimism is unwarranted (e.g., trap, and not make persistent state changes to e.g. memory, so that software can re-translate in a less optimistic fashion).

    watch for that one, it should be coming soon

    I'll be surprised if it does come, given that in the most recent patent they quite explicitly referred to translation software.

  • This confirms what we were able to decypher from the patent document. They are building a sort of universal processor capable of translating instructions of other machines into an internal native format and then executing them.

    I suppose the interesting thing would be to run benchmarks and see what emplated instruction set runs fastest. A benchmark between Linux/Alpha, /Sparc, and /Intel would be interesting.

    I suppose it's just a matter of finding which instruction set is most easily optimized.

  • According to the article, the chip will be able to emulate a fair number of different processors. That the initial focus of their emulation software is on the largest market is neither a surprise nor disappointing. It's good business.

    I just hope we see a version of Linux running in processor native mode or at least under some microcode without all the legacy baggage that Intel's 80x86 family brings.

  • by Anonymous Coward

    I haven't seen anybody else post on how to read the patents, so... go to http://www.uspto.gov/patft/ and search by number. The numbers are:

    5,958,061 Host microprocessor with apparatus for temporarily holding target processor state

    5,926,832 Method and apparatus for aliasing memory data in an advanced microprocessor

    5,905,855 Method and apparatus for correcting errors in computer systems

    5,832,205 Memory controller for a microprocessor for detecting a failure of speculation on the physical nature of a component being addressed

    --Steve, comments@vrml3d.com
  • From Rob:

    You're never gonna believe it: a chip that will emulate the x86.

    Dear god (bet you'd never hear an atheist say that, eh? =P), I really hope that Rob was being sarcastic when he said that..

    From AJ:
    This confirms what we were able to decypher from the patent document.

    Yeah, we were all speculating on this for quite some time now.. (indeed, it was speculated that the Transmeta processor would eventually emulate all the major architectures..) Which just goes to show that Rob and co. really don't read our posts.. Ever. It was only one of the most talked about topics in recent weeks.. ;) We're never going to believe it, indeed.. Too damn slow CNet! =P

  • Nope. But only becouse AMD is doing the same thing 'A different way'. If you use the same method of doing things, you pay Intel. If you come up with your own, you don't. This is why the chips can actually run faster then eachother in DIFFERENT situations. Doing one thing may run faster on the AMD, and another run faster on the Intel chip.
  • Last summer I was thinking about transmeta's patents, their secretiveness and Linus' involvement with them and came up with the following speculation:

    A chip to emulate an x86, or even multiple architectures isn't all that interesting. However, Linus is known as a kernel developer rather than a chip specialist. Link a vmware type kernel with an emulating CPU and you could run multiple OSes on a single machine at the same time.

    Now that would be cool. :)
  • This is kind of off topic, but interesting none the less. I have stumbled upon a couple of interesting web sites. The are almost exactly the same as the Transmeta site, the only difference being the name of the site. The HTML source has the same comments as well. Other than that they don't appear to be related to Transmeta. Does anyone else have any ideas? Here they are http://www.cryogen.net and http://www.linuxlinks.org
  • and, Transmeta representatives did not return phone calls

    Transmeta has representatives? They have phones? Thats news. The fact that they didn't return their phone calls is no news. If they did return their phone calls, even just to say hi. That would be the news of the decade.
  • the trouble is that it analyse your personal taste sense and nutritional data, but it would taste almost but not quite entirely unlike gum, and tell you to "share and enjoy"
  • You might be entirely right. I was simply offering some pure conjecture, nothing more. I was hoping for something more truly revolutionary than what it might end up being. After all, if all they're doing is software emulation, that's been done many times before, sometimes rather well. For example, Digital's x86-to-Alpha translation system (I forgot the name, something with "W" and "X" and "32" in it I believe) which saves translated code and uses that one the next time around is quite brilliant and works very well from what I've heard.

    I guess I'm simply hoping for someone to provide that decisive push to get more parallel computing into the mainstream. I used to root for the BeOS, until they went the OTHER way, supporting single CPU architectures. The current CPU upgrade path is just some lame and tired; every new Pentium generation gives another few percentage points of improvement in doing the same old stuff. I can hardly wait for the Merced--NOT.
  • Not only x86 must be targeted if their product is to make any sense after all.

    First, it is a bit difficult to overtake Intel in performance, since the PII/PIII chips have pretty modern architecture inside. When you use a translator+EPIC it's not much better than a plain modern chip that fetches/decodes x86 instructions and sends them over to processing elements on the same chip. If you'd like performance from an EPIC chip, you shouldn't be using an old instrction set at all.. that feels like burning coal to power up a Porsche.

    On the other hand, if you have great emulation support for Java VM it'd make great sense. That could be a competent design. You could have the kind of chip that gives you Swing applications that are as good as plain old x86 apps.
  • I was simply offering some pure conjecture, nothing more.

    Yes, but the patent seems not to support the conjecture - which was made after the patent was mentioned in a Slashdot thread, complete with a link to the patent's text.

    if all they're doing is software emulation

    From the patent, it appears that they're doing hardware to let software translation make optimistic assumptions about what the code might do, and recover if the assumptions were overly optimistic, rather than having the software have to assume that (to give an example that I think was mentioned in the patent) the code might make an unaligned reference that crosses a page boundary.

    For example, Digital's x86-to-Alpha translation system (I forgot the name, something with "W" and "X" and "32" in it I believe)

    "FX!32".

    which saves translated code and uses that one the next time around is quite brilliant and works very well from what I've heard.

    I'm curious whether it ever has to make overly-cautious assumptions that hardware assists along the lines of the ones mentioned in the Transmeta patents would let it avoid, and whether those assumptions actually cost it enough that those hardware assists would be worth it or not.

  • The patent that was granted yesterday was filed in 1996. More than three years ago. Is it me, or does the technology world jump ahead by leaps and bounds in matters of weeks? This new patent doesn't give any new clue on what they might be up to, only what they were thinking of doing way back when. Who knows what they've cooked up in the past three years?!



    -j
  • Nearly - it's the 'increasingly inaccurately named Hitch Hikers' Guide tilogy'. Babelchip here we come! j.
  • > Think of it as an alpha chip that will run any off the shelf windows program you pick up at the corner software store.

    Actually, the same is true of the real DEC / Compaq Alpha chip. It can run X86 Windows binaries using very highly optimized software emulation. The technology is called FX32, and is available for free. Unfortunately, the project was recently cancelled.

    Of course, the Transmeta chip (according to the popular speculations) will do this X86 emulation in hardware/microcode rather than in software, but we shouldn't ignore that which is available today. For what it's worth, in spite of its software-based approach, FX32 runs nearly as fast as the code would natively on a similarly clocked X86, due to use of dynamic recompilation.

    Div.


    But my grandest creation, as history will tell,
  • Integrate those processors onto one chip, convert the translation stage over to hardware and integrate that too, and remove the redundant parts. What you end up with is a modern super-scalar decoding processor -- a lot like a Pentium II/III.
  • Didn't he leave the company?
  • So the secretive company is just making another x86 chip - without paying Intel lisencing. Does this mean that other x86 cloning companies are paying vaste sums of money to Intel?

    So by buying an AMD chip, I'm still putting money in Intel's pockets?

    Go figure.
  • This confirms what we were able to decypher from the patent document. They are building a sort of universal processor capable of translating instructions of other machines into an internal native format and then executing them. The processor also includes a large cache, so that once instructions are translated, they can be executed natively without the need to re-ranslate. At least until they are no longer in the cache.

    Anybody wanna guess what they'll call it? Babelchip maybe?
  • Isnt this ironic for all the chip manufacturers?
  • I hate to ask this, but who's going to produce these things?

    Even though TransMeta manages to get around Intel's patents, might they still license Intel to produce the chips? Or AMD?

    Guess that's still a "wait and see", unless someone knows something???

  • Is Linus already working on the Linux port to the native Transmeta chip? And will it be ready by time the chip is released?
  • This has only minorly to do with Intel. This is simply another episode in the long running line of Alien Involvements(tm). The Pyramids, Stonehenge, Superman's death, and now, this. One needs only to look to their company roster to see the obviousness of this statement: Linus Torvalds. Ever heard the guy speak? World domination and a community of friendly programmers repeatedly crop up. This is the same idea presented in such based-on-soon-to-be-true alien invasion stories as Independence Day and Mars Attacks.

    No, what this really is is a human brain emulator. Able to compile human instruction code on the fly, aliens will be able to infiltrate our culture and control us from the inside, using Linux as the OS of choice. We will be as helpless as that pharaoh dude they locked up in the pyramid.
  • I haven't heard that, until now. Somebody...say it ain't true...
  • by Esperandi ( 87863 ) on Friday October 01, 1999 @03:29AM (#1646534)
    My read of the new Transmeta patent confirmed that yes, the processor will "emulate" other instruction sets... but that is not the important heart of the patent. The patent is not on a chip that translates instructions from one set to another (watch for that one, it should be coming soon), the patent is very specifically on a very important issue to operating system designers. Basically, their chip sounds like it will handle multiprocessing (not multithreading since the processes will not share their environment) and prevent process deadlock. I've never seen a study on deadlock avoidance in a situation where the instruction sets are multivarious and being cross-translated but I imagine it could get quite hairy!

    Esperandi
  • Hrrrm, only if you use what Intel's patented. My impression from that CNET article is that anybody can build a chip that supports the x86 instruction set, but if you want to perform certain checks (the bounds/limit checking) in hardware just as x86 does, you're looking at needing licensing.

    VLIW, eh? Wonder if they're looking at IA-64 as well.
  • This makes a bit of sense actually.

    What's the name of the company? Trans/meta/
    What are they building? A /meta/ CPU.

    (Someone's already pointed this out, I bet.)
  • No, the main question is, could you program the processor in such a way the an SMP machine could emulate a Beowolf cluster? Hmm... Would Linus be working on that???
  • by Anonymous Coward
    Consider the following:
    * The Transmeta html has a typo
    * www.cryogen.net does not
    * www.linuxlinks.org does not

    Additionally, to make this interesting story even stranger, I see that the html in www.cryogen.net and www.linuxlinks.org are nearly identical!

    And to further blow your mind, the text "This web page is not here yet." ends in a period with www.cryogen.net and www.linuxlinks.org, but actually ends in an exclamation point with www.transmeta.com!

    I am extremely perplexed by the complexity of the relationships between the 3 web pages. Obviously an investigation should be launched immediately!!!!

    In my opinion the NSA should be involved (of course they might be at the bottom of all this).

    signed,
    David Nichols
  • Do a search for Transmeta on Slashdot. They will use IBM plants... Here [slashdot.org].
  • More interesting is the fact that the chip isn't limited to emulating Intel...

    Sure we hope... But.. Can you imagine how difficult would it be for a software to translate x86 code to a VLIW architecture very efficiently? I bet the IA64 Linux&GCC people still have something that barely just works, i.e. compiling C to VLIW is still difficult, but Transmeta needs to do this for raw x86 codes...

    I guess this is why there were delayed, probably they targeted Java at first, and then moved onto x86 (or maybe backwards), so a complete, efficient emulator for another architecture (including hardware devices) could take quite a few long boring nights... Hopefully they disclose all parts of these translation, so we all can have fun building our C64, ZX81, CP/M, etc. emulators :)

    (Another side thought, as they seem to be able to translate any arbitrary sequence of instructions to a VLIW stream, they probably can translate even at the API level, i.e. by translating random Win32 stuff like call ObtainAtomicMutex (I know this is not a real call :), by compiling it into something like LOCK; GETSEM; the possibilities are endless.. Maybe finally we can see a speedy Windows program... :)


  • www.transmeta.com

    Organization:
    Transmeta Corperation
    3940 Freedom Circle
    Santa Clara, CA 95054
    UNITED STATES

    Administrative Contact:
    HOSTMASTER@TRANSMETA.COM
    Phone: (408) 327-9830
    Fax: (408) 327-9840

    Technical Contact:
    Transmeta Hostmaster
    HOSTMASTER@TRANSMETA.COM
    Phone: (408) 327-9830
    Fax: (408) 327-9840

    Billing Contact:
    Transmeta Hostmaster
    HOSTMASTER@TRANSMETA.COM
    Phone: (408) 327-9830
    Fax: (408) 327-9840

    -------
    www.crogen.net

    Organization:
    Cryogen Networks
    9 Locust St
    Madison, NJ 07940
    UNITED STATES

    Administrative Contact:
    ajp@ADELPHIA.NET
    Phone: 973-410-1159

    Technical Contact:
    AJ Prowant
    ajp@ADELPHIA.NET
    Phone: 973-410-1159

    Billing Contact:
    AJ Prowant
    ajp@ADELPHIA.NET
    Phone: 973-410-1159

    --------------

    www.linuxlinks.org

    Organization:
    linuxlinks.org
    9 Locust St.
    Madison, NJ 07940
    UNITED STATES

    Administrative Contact:
    ajp@ADELPHIA.NET
    Phone: 973-410-1159

    Technical Contact:
    AJ Prowant
    ajp@ADELPHIA.NET
    Phone: 973-410-1159

    Billing Contact:
    AJ Prowant
    ajp@ADELPHIA.NET
    Phone: 973-410-1159

    Is there a connection? No se.
  • I hear they're working on a new gum as well, but they're not ready to talk about it yet, because when the gum decides that it's going to taste like blueberry, they person who's chewing it will turn blue and swell up until he/she is a big sphere, and needs to be rolled away to a special hospital staffed by singing midgets.

  • All the news articles coming out about this seem to be focusing on x86 emulation, which I don't get. merced is almost on our doorsteps, and every day we hear about a new company who's OS is now booting on merced.

    Now I don't think that the first iteration of merced is going to be widely adopted. But I think that the second will move it's way into the market extremely quickly and after that x86 is going to fade fairly rapidly. As transmeta has no products now, why would they position themselves to compete with a chip whose extinction is imminent?

    Of course their babelchip will allow them to compete with any chip that they want, but my guess is merced will be their primary target. Perfect timing too -- let intel start building up the hype and get developers programming for the merced, and once manufacturers are about to jump onboard, step in with a solution for a fraction of intel's price.
  • and since dave taylor works there, maybe they're building this thing out of pinky processors....

    does anybody have a copy of the pinky processor spec that he had posted on his page at crack dot com before they went bankrupt? i had it bookmarked, but it went away, and i have never been able to find another copy of it....
  • Accepting that current processor deal with linear data. The Transmeta processor will deal with it in a planar fashion.

    1. What do you mean by "linear" and "planar" here?
    2. What evidence do you have that Transmeta are, in fact, doing this?
  • by GnrcMan ( 53534 ) on Friday October 01, 1999 @06:35AM (#1646550) Homepage
    I just want to warn you that most of what the "expert" Richard Belgard has to say on the matter is nonsense. I sent a message to the Journalist who wrote the article, here it is:

    I was reading your recent article regarding the Transmeta patents. I develop compilers and so have some background in the area of low level processor archetecture, specifically exception handling.

    I'm not sure who Richard Belgard is but much of what he says regarding the patent is nonsense. He may know patents but his interpretation of the patent is largely misguided.

    First, some corrections:
    Your article states: "Transmeta could be able to sell its chips at a lower, more-competitive cost by avoiding fees it would otherwise have to pay to license Intel patents"

    While it may be true that Transmeta can save money by avoiding Intel's patents. That is not why this method will be more inexpensive. The reason the chip will be cheaper is because it is VLIW. That makes for a simpler processor design and more inexpensive chip. Many optimization functions are offloaded, making for a simpler chip. Simpler also translates into higher clock speeds (faster chip).


    Later, the article says: "those instructions are stored in memory--either conventional memory or high-speed "cache" memory--so they can be called upon quickly. Because of this method, the Transmeta chip would be good at performing the same instructions over and over, a circumstance that wouldn't force the delays imposed by the translation process...That could make the Transmeta chip a good choice for something like a router..."

    I'm not sure why the cache is focused apon so much. It really is an unimportant part of the patent. caches are used very commonly and it's use here is common sense. Regarding the sugestion that the chip may be good for something like a router, that's pretty silly as well. Routers and set top boxes are specialized and therefore don't need to emulate another processor. Using their own processor makes much more sense. Emulation would just be a waste.

    Later: "Specifically, it describes when a step in the translation is complete enough that it should be stored in memory"

    That is aproaching accurate, but isn't how I would describe it. I'll approach this one a little differently.

    Problem: Emulation is slow because state (that is, a 'snapshot' of the processor's...well...state) must be stored for each instruction executed. This is in case an unexpected event or error occurs. This takes up time and makes it so that instructions cannot be reordered for efficiency.

    Solution: Store memory writes in a buffer until a 'commit' happens. At this time the processor checks if any of the previous instructions generated an error. If not the buffer is written to permanent memory. If so, the processor can roll back to the point of the error and handle it appropriately.

    I cannot stress enough how important this is from a feasability standpoint. This jumps over one of the major hurdles of emulation.

    Another small point; Comparing this to AMD or Cyrix attempts is like apples and oranges. They have made clones. This is an emulator. That's why the mention of Intel's patents is a little strange in this context. It isn't intended to create an Intel clone (like AMD or Cyrix). This is an attempt to create a generic "processor agnostic" chip, capable of running anything, as far as I can tell...including Merced. It's important to also note that this chip can apparently run it's own native code as well.

    If you have any questions, e-mail casey@sarahandcasey.com



  • Hmm...let's analyze the evidence...

    Linus has gone on record stating that he believes the big growth industry for Linux is in embedded systems.

    Linus is associated with Transmeta.

    Transmeta has filed for (and received) a number of patents that could be related to the development of...
    * a uP that can emulate "non-native" instructions (either another uP's instruction set or some languages byte codes) via hardware.
    * an ultra-high-speed uP.
    * a uP that can detect error states before executing the instructions that would cause them
    * a uP that should be able to do parallel processing with shared memory.

    Hmm...what does that add up to?

    *I* think we should be expecting some cool new ultra-high speed, parallel processing, embeddable chip...perhaps for use in kick-ass routers (as the article suggests), and/or a new class of PDA. It will probably be a design that can "scale up" to be used in a desktop/server/mainframe environment.

    It's the Mother of all Chips!!!

    ...anactofgod...

    Or, I could be *completely* off base, here...

  • If you apply the same thinking to the second comment...

    There are no tyops in this web page

    You get TRANTINA. Which backwards is Anita Art.

    TheRe Are No Tyops IN this web pAge.

    Hmmmmm..... I'm thinking we all need serious help.
  • It SEEMS to jump ahead by leaps and bounds in matters of weeks... but years of planning goes into those leaps and bounds.

    Still, I wouldn't be surprised if these patents didn't relate to the core of Transmetas product...

    In other words, Transmeta is working on some fabu stuff and... OH, they just happen to have developed these cool technologies as part of the product.

    On the other hand, it may all just be wishful thinking. The increases in performance have seemed so incremental (although still statistically impressive) in the past few years that we long for a product that blows us away.
  • I don't know about Motorola's Fab caps, but I would think they are pretty state-of-the-art too. . . I don't know why, but for some reason Motorola just seems like it'd be a good fit in my mind. . . :-)
  • Forgive me for any inclarity, this information is mostly just thought excercises to remedy boredom. 1.What do you mean by "linear" and "planar" here?
    Data these days is processed in a linear fashion. Instructions are streamed through the core and output is streamed back. I guess there are a few ways it could be done considering the ambiguity of my statement.
    A.
    xxxxxxxx xxxxxxxx Consider that a linear instruction to be processed linearly.
    xxxx xxxx xxxx xxxx xxxx xxxx xxxx xxxx This could be a planar instruction to be carried out. Computations would be built around matrix comparisons, probably using the basic logic structures.
    Admittedly you could just as easily string the rows together to pull it back into linearity. It would be a problem though once spacial and rotational modifiers were included into the instruction set.

    B.
    Another possibility would be to remove the nondimensionality of a binary computation.
    Expand the expected/accepted values from 0,1 to 0, 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1 or more. Each bit would now have a depth as opposed to an extreme. Yes, this gets into the realm of fuzzy lohgic, but Bart Kosko has pioneered the mathematics behind it. The expense of building multivalued logic gates on the other hand might be a bit expensive for a microprocessor. A light based computer would be perfect for this design.

    C.
    I think there might be another, but it isn't coming to me right now.

    2.What evidence do you have that Transmeta are, in fact, doing this?
    None whatsoever. I did title my comment "Lies, hoaxes, The Right Thing(tm)"

  • Now that you point that out... it makes much more sense... I am familiar with the "bablefish" from the Hitchhiker's Guide... damn, don't I feel like fool missing that one. :) But without errors like this, how can any one slip in a reference to Jusux OS?

    DON'T PANIC
    (sorry, no friendly letter fonts available)
  • Motorola goes to IBM for most of their fabrication....
  • No. Transmeta is making a chip that will stream and compile x86 instructions into a batched super-long word instruction set that can be acted on by a far more advanced processor.

    The possibility is 100% compatability with your old legacy software (without being much slower or maybe even faster than the actual intel chips) but programs written to directly access the transmeta chip would be orders of magnatude faster.

    Think of it as an alpha chip that will run any off the shelf windows program you pick up at the corner software store.

    More interesting is the fact that the chip isn't limited to emulating Intel so transmeta may actually transend the metaverse and let you run mac, windows, and linux programs without rebooting :-)



  • Man can I would have *never* guessed they were designing ANYTHING like an x86 emulator, heck I thought they were gonna make the worlds most expensive flavor of gum, one that could link into your brain and determine what flavor you want it to taste like, and then change its molecular patterns and be that flavor, and after time adapt to your needs, and predict what flavor you will want five seconds from now. An x86andwhateverelsemulator who would have thought!
  • Is Linus working on writing the native language for the chip? (which, I just realized, is basically what yours is)

    Or.... is Linus working on a _new_ OS that'll be the native OS for the Transmeta chip? Will Transmeta produce the chip themselves, and start their own line of desktops, servers, laptops, etc?
  • Think about an OS/Hardware combination that could run multiple native binaries from vastly different CPU architectures, all on one (meta)processor...No need for software emulation or add on processor boards.

    Yes...I can imagine how hairy this could be to design and implement, but having a (meta)cpu that can handle much of the work -in hardware- would make it approachable.

    I -really- like the Babelcpu name that someone posted here :-)

  • Oh, man, I knew it! This is what Klinton and his New World Order thugs were after all this time! Soon, we'll all just be processing nodes in a big Commie cluster!

    *bong hit*

    These are the End Times, bros.
  • Think the chips will be able to emulate some of the hardware classics? I'm picturing it...

    "Yeah, my computer's cpu can emulate everything from eniac[spelling?] to hal9000."

    But best of all I can finally play my chess for CP/M programme that's been sitting on a 5 and a quarter untouched for years..... :)

    (i wish)

  • I don't see how this could be a really hard choice of who will be producing them. There are only two companies that have the latest greatest fabs. Intel and IBM. I cannot see Intel doing the fab on the chips, well because the chip would directly compete with Intel. I also doubt Transmeta would want to license it to Intel for the same reasons. IBM on the other hand would definitly like to have its name associated with a chip that has the potential to unsurp ol' Mighty Intel. I could be wrong but I don't think AMD has any fab plants, or any that can do sub .25 micro,....those suckers are expensive....most of the Fab plants running around in the US are ones that Intel/IBM dumped to other companies when they needed to go onto bigger and better.

    My 2 minutes worth.

  • Hey! I posted this yesterday and nothing happened...there is a good article at The Register:

    http://www.theregister.co.uk/991001-000005.html

    Sort of what I guessed actually. Cool stuff. A hybrid software/hardware CPU, the hardware part implementing very fast micro-instructions, while the software part translates from one instruction set to the native one.
  • Hrmm.. there must be some sort of secret message embedded in the transmeta and related web pages. First off, all of the phases, comments and text, are worded oddly. Is this because Linus wrote them in a Swedish/Finnish flavoured style of English? Or are they worded like that to hide some evil ciphertext? Secondly, the comments in the webpage are kinda interesting. They specifically say that there are no secret messages and then there is the "there are no typops" comment.... intriguing...

    The only half-baked secret message I can find is that the word "Transmeta" is embedded in the first comment. I am not sure if this is intentional, I can't find a pattern to it, or if it is just fluke, but take a look. Maybe I'm turning into one of those crazy people who said "Paul is dead" I dunno...
    -- TheRe Are No Secret MEssages in The source code to this web pAge. --
  • Well, this was the same thing people were saying the FIRST time TransMeta came out with Patent requests. It's more obvious now that they're aiming at generic instruction set chips (GISC?) that can "emulate" other chips.

    But what's changed? Well, for starters, there's a bit more talk about the instruction forecasting method they're going to use.

    I also don't see any mention of the new self-configuring chip technology that's made news in the last year. People thought that would be the Intel Killer, since it could be programmed to be faster at whatever it's doing at the moment.

    Anyway, if TransMeta goes as expected, it'd be great to see them outpace x86 chips with the same instructions, but if it's capable of that, imagine exploting its power with native code? The "meta" part is great as a transition, but imagine Linux compiled natively on a chip capable of such feats?

    Or one could invent new virtual machines and meta-emulate the hardware on these chips for development? Just imagine, a true InterCal chip!
  • I assume that that when you say Babelchip, you are referring to the biblical account of the tower of Babel... which tells a story about the source all the different languages that exist. I suggest, despite the cool-sounding name, that Babel suggests the confusion of languages... plus the biblical reference might suggest that it run the Jesux OS as it's native OS.

    I suggest a name that indicates the unification of multiple languages. No single name encompasses that idea than that of the Rosetta Stone.

    For those of you who ignored high school in favor of a GED and late nights hacking code to the latest tunes of some Goth band-- the Rosetta Stone was the single key in unlocking the mystery of the Egyptian hieroglyphics. Napoleon's troops discovered it in 1799 near the seaside town of Rosetta in lower Egypt, and it eventually made its way into the British Museum in London where it resides today. It is a slab of black basalt dating from 196 BC. inscribed by the ancient Egyptians with a royal decree praising their king Ptolemy V. The inscription is written on the stone three times, once in hieroglyphic, once in demotic, and once in Greek. Thomas Young, a British physicist, and Jean Francois Champollion, a French Egyptologist, collaborated to decipher the hieroglyphic and demotic texts by comparing them with the known Greek text. From this meager starting point a generation of Egyptologists eventually managed to read most everything that remains of the Egyptians' ancient writings.

    Anyway, I think that a reference the Rosetta Stone would be a great option for the Transmeta chip. Then again Babelchip might be a good idea-I always thought the Jesux OS was a good idea :)

    My $.02
  • Oh yeah, tha article is titled:

    New Transmeta patent reveals x86-killer design

    duh
  • I thought they were gonna make the worlds most expensive flavor of gum, one that could link into your brain and determine what flavor you want it to taste like, and then change its molecular patterns and be that flavor, and after time adapt to your needs, and predict what flavor you will want five seconds from now.

    That might be like Better Than Life in Red Dwarf. But what if your subconscious, like Rimmer's, didn't want you to be happy? Would you subconsciously wish for cabbage-flavoured gum?

  • T he main problem I see is the relatively low logic density of FPGAs as compared to dedicated hardware...

    Not to mention the cost!!! Per gate, FPGA's are more expensive to manufacture, and a design to emulate a set of gates generally uses more gates than the design it's emulating. It adds up to a very expensive system.

    An FPGA-type of architecture may make the hardware more flexible than fixed-function hardware, but it certainly won't be as cheap!

    This makes me wonder what market Transmeta is targetting.

    • Generic home user? A Celeron or K6 is cheaper.
    • Business user? Transmeta is not yet accepted in the business market, and likely won't be able to gain significant market share for a long time. Witness AMD.
    • Power user? Maybe... but it won't be cheap, and won't be in big volumes. Targetting the power user is generally not a got business model, because there just isn't money there.
    • Handhelds? Hmmm... much more interesting. "I'm a cell phone! No, I'm a PDA! No, I'm a network analyzer!" A multifunction, small device could benefit from a flexible processor... which coul emulate the Intel processors used there now... which would reduce size and power by having flexible hardware...

    So maybe the is the processor for the Hithiker's Guide!

  • That message was actually from me...someone ate my cookies!
  • From Rob:

    You're never gonna believe it: a chip that will emulate the x86.

    From Kish:

    Dear god (bet you'd never hear an atheist say that, eh? =P), I really hope that Rob was being sarcastic when he said that..

    and finally, from Stack:

    I think it's pretty clear that he was. Just because he can't spel veri we'll doesnt meen hes brane-damudged, aftir oll...

    --
    "HORSE."
  • i started thinking about practical applications of dynamic instruction switcing. i see 3 real cool applications

    1. bytecode compatability. pretty much eliminate the need for a java virtual machine. i know this seems pretty obvious, but consider the effect of typeing main.class at the command line witch dose an instruction switch to java mode. essentaly your applet is running at full processor speed... jit compilers are neat and all, but this would blow that compleatly away in terms of speed.

    2. interpreter context switching. consider what happens when perl encounters a regular expression... rather than evaluating a dfa with pointers and such, you load up the proccessor with specialized instructions specificly for evaluating that dfa. upon completion, insturction switch back to standard mode...

    3. big instructions. say you need to calculate the volume of a zillion spheres of random radius.
    well, create an 4/3*pi^3 instruction, and load it. idealy that would be 1 calc per clock tick. imagine what effect this would have on something like quake, a gigantic instruction that returns one pixel value per clock tick... of course generating the truth tables for functions like the pixel per tick is just about impossible, but there are plenty of trasfomations that would be pretty easy to generate, and they only have to be generated once. from then on it's a matter of loading the thing. you could tailor a specific MMX style instruction for your program.

    i wonder if they implement a "full" instruction set like the connection machine? ie 2^32 ~= 4 billion instructions, just pick the one you need...

    if thats what it is, it sure seems cool...
  • I believe multiprocessing is a level above what's going on here. This is a VLIW (very long instruction word) processor. That means each instruction is made up of a number of shorter instruction segments that are handled separately, in parallel. Ideally, a CISC instruction will fan out into a number of sub-instructions which can be handled in one step by the chip, or interleaved with other instructions, so long as the net effect is identical to executing the same instructions in their original order. It's difficult to do this kind of translation and parallelizing/reordering without occasionally hitting an exception of some kind, such as a deadlock, which would indicate that the translation failed.

    At which point one needs to back up to a safe point and try a different approach (possibly pulled in from the translation cache they've mentioned), until the instruction succeeds. The mechanism used to back out is a memory write journal with a commit/rollback facility.

    "Deadlock" is a phenomenon which can occur in any system of multiple agents and shared resources. At the chip level the agents are executing instructions, and the resources being shared are registers, memory locations, and possibly cpu components such as fpu's and adders, etc. Process deadlock is a higher-level concept that applies to shared resources managed by an operating system.
  • by soupdragon ( 23553 ) on Friday October 01, 1999 @03:46AM (#1646581)
    Although all the information released to date about the Transmeta technology is concentrating on its ability to run x86 (or any other) chip-specific code, surely the ultimate goal is to run native code on this fast cheap hardware. If it run x86 code at high speed, then Transmeta have a potential revenue stream from day one. But hey, that doesn't really explain what Linus's role in all this does it.

    Say that in parallel to developing the x86 compatability, Transmeta are also developing a native code environment. What operating system would be the easiest to port to such a new environment, and who would you want on board to do it for you? Duh...
  • ``My read of the new Transmeta patent confirmed that yes, the processor will "emulate" other instruction sets... but that is not the important heart of the patent.''

    I hope you're right. I distinctly remember reading in one of the IEEE Transactions back in the late '80s about a researcher, at UofI/Urbana I think, that made a VLIW processor emulate an i386 and it performed at some fantastic amount faster than the real thing. I'm no patent attorney, but it seems to me that if all it takes to get awarded a patent is to dredge up some University research papers and IEEE reprints, make an application, and get a patent, then things have gotten totally out of hand at the Patent Office. (Well they may be already with respect to software patents but that's another story.)

  • Wasn't there someone on that patent thread a couple days ago that said "TRANSlatingMETAprocessor"?

    -Saxton


    _________
  • by uradu ( 10768 ) on Friday October 01, 1999 @03:50AM (#1646584)
    That emulation of the x86 instructions is involved was pretty obvious from the patent document itself. The question is HOW is it done, and no more light has been shed on that.

    Personally, I believe they're working on a meta-CPU which doesn't have a native general purpose instruction set of its own, but rather can be programmed to impersonate any number of processors on the fly. This makes sense particularly in light of the rising popularity of FPGA-type approaches to computing. The recent announcement by a company (I forgot the name) of a "mainframe on the desktop" (no, it wasn't Apple!) which is based on 256 or so FPGAs is typical of the trend. Scientific American in its previous issue had several articles about research at MIT into future computing devices, particularly handheld units containing FPGA-type hardware that is reconfigured dynamically to perform whatever functionality the current task requires.

    If they strike the pot of gold and do it right--if indeed it can be successfully done--the implications are sublime. Imagine having a PC that can "multitask" being a Pentium, a MIPS, an Alpha, a PPC, a Z80, etc. The processing unit constantly time slices between the different CPU "emulations", each of which in turn is running some operating system. This wouldn't be real emulation in the sense of translating foreign instructions to a native set, incurring the necessay slowdown, but rather instruction decoding in hardware.

    The main problem I see is the relatively low logic density of FPGAs as compared to dedicated hardware. Implementing an ALU on an FPGA would require considerably more logic gates and real estate, simply because those gates are general purpose and can also do lots of other things besides being part of an ALU. In addition, having more gates implies more propagation delays, longer signal paths, etc etc. The real gem would be to come up with a strategy or technology which can resolve these issues while still providing all the benefits of a truly generic "CPU".
  • by Anonymous Coward on Friday October 01, 1999 @03:52AM (#1646585)
    That's all been resolved now.

    Apparent Linus stubled across project "herring" at TransMeta. He had believed that is was the company's project to keep the press and competitors off the trail of what they were working on.

    In reality project "herring" was a super-secret project for the US military to turn penguins in the ultimate killing machine. Reports surfaced of emperor penguins with machine guns embedded in their eye sockets and tactical nukes implanted in their bulbous bellies.

    The project was cancelled after the army decided to test the work and dropped 1000 of the altered penguins from a B-52 bomber over the Nevada desert. They apparently didn't realize that penguins couldn't fly and the horror of 1000 penguins impacting like water ballons quickly resulted in the project's cancellation.

    Thus ended, Linus was able to return to work where the penguins now deliver mail.
  • that /Trans/lates the instructions from other platforms into native instructions.

    Spooky. ;)
  • Considering that some of the development team are the same team from the IBM PowerPC 615 chip, which could do the same thing as this fabled /meta/ chip (except with a focus on PowerPC and x86 instructions), I am not suprised.
    As far as production, I would assume IBM as a likely producer of such a chip, due to their familiarity with the design team and their firm desire to substitute something for their Intel chips, as shown through their prior partnership with Cyrix, their "Blue Thunder" and the 615 chip.

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